Multi-Level Inputs w/ Internal Termination
NB6VQ572M 1.8V / 2.5V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Translator
Multi−Level Input...
Description
NB6VQ572M 1.8V / 2.5V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Translator
Multi−Level Inputs w/ Internal Termination
Description
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The NB6VQ572M is a high performance differential 4:1 Clock / Data input multiplexer and a 1:2 CML Clock / Data fanout buffer that operates up to 5 GHz / 6.5 Gbps respectively with a 1.8 V or 2.5 V power supply. Each INx / INx input pair incorporates a fixed Equalizer Receiver, which when placed in series with a Clock / Data path, will enhance the degraded signal transmitted across an FR4 backplane or cable interconnect. For applications that do not require Equalization, consider the NB7V572M, which is pin −compatible to the NB6VQ572M. The differential Clock / Data inputs have internal 50 W termination resistors and will accept differential LVPECL, CML, or LVDS logic levels. The NB6VQ572M incorporates a pair of Select pins that will choose one of four differential inputs and will produce two identical CML output copies of Clock or Data. As such, the NB6VQ572M is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The two differential CML outputs will swing 400 mV when externally loaded and terminated with a 50 W resistor to VCC and are optimized for low skew and minimal jitter. The NB6VQ572M is offered in a low profile 5x5 mm 32−pin QFN www.DataSheet4U.com Pb −Free package. Application notes, models, and support documentation are available a...
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