STU408D

S amHop Microelectronics C orp. S T U408D J uly.25 2006 www.DataSheet4U.com Dual N-C hannel E nhancement Mode Field E ffect Transistor P R ODUC T S UMMAR Y V DS S 40V F E AT UR E S ( m W ) Max S uper high dense cell design for low R DS (ON ). ID 16A R DS (ON) R ugged and reliable. TO252-4L package. E S D P rotected. D1 D2 30 @ V G S = 10V 40 @ V G S =4.5V D1/D2 G1 G2 S1 G1 S2 TO-252-4L G2 S1 N-ch S2 N-ch ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted) P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous @ Ta -P ulsed a S ymbol V DS V GS 25 C 70 C ID IDM IS Ta= 25 C Ta=70 C PD T J , T S TG Limit 40 20 16 13.8 50 8 11 7.7 -55 to 175 Unit V V A A A A W C Drain-S ource Diode Forward C urrent Maximum P ower Dissipation Operating Junction and S torage Temperature R ange THE R MAL C HAR AC TE R IS TIC S Thermal R esistance, Junction-to-C ase Thermal R esistance, Junction-to-Ambient 1 R JC R JA 13.6 120 C /W C /W S T U408D Parameter OFF CHAR ACTE R IS TICS Drain-S ource Breakdown Voltage Zero Gate Voltage Drain Current Gate-Body Leakage BV DS S IDS S IGS S V GS (th) R DS (ON) ID(ON) gFS C IS S C OS S CRSS c www.DataSheet4U.com E LE CTR ICAL CHAR ACTE R IS TICS (T A =25 C unless otherwise noted) S ymbol Condition V GS = 0V, ID = 250uA V DS = 32V, V GS = 0V V GS = 20V, V DS = 0V V DS = V GS , ID = 250uA V GS = 10V, ID = 8A V GS = 4.5V, ID = 6A V DS = 5V, V GS = 4.5V V DS = 5V, ID =8A 10 15 735 120 70 V DD = 20V, ID ...