MC100ES6017

Freescale Semiconductor Technical Data Document Number: MC100ES6017 Rev 2, 09/2005 www.DataSheet4U.com 3.3 V ECL/PECL Quad Differential Receiver The MC100ES6017 is a 3.3 V ECL/PECL quad differential receiver. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled down to VEE. This operation will force the Q output LOW and ensure stability. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 µF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. Features High bandwidth output transitions LVPECL operating range: VCC = 3.0 V to 3.6 V Internal input pulldown resistors on D inputs, pullup and pulldown resistors on D inputs 20 lead SOIC package Ambient temperature range -40°C to +85°C 20-lead Pb-free package available MC100ES6017 ECL/PECL QUAD DIFFERENTIAL RECEIVER DW SUFFIX 20-LEAD SOIC PACKAGE CASE 751D-07 VCC 20 Q0 19 Q0 18 Q1 17 Q1 16 Q2 15 Q2 14 Q3 13 Q3 12 VEE 11 EG SUFFIX 20-LEAD SOIC PACKAGE Pb-FREE PACKAGE CASE 751D-07 ORDERING INFORMATION Device 1 VCC 2 D0 3 D0 4 D1 5 D1 6 D2 7 D2 8 D3 9 D3 10 VBB MC100ES6017DW MC100ES6017DWR2 MC100ES6017EG MC100ES6017EGR2 Package SO-20 SO-20 SO-20 (Pb-Free) SO-20 (Pb-Free) Figure 1. 20-Lead Pinout (Top View) and Logic Diagram PIN DESCRIPTION Pin Dn, Dn Qn, Qn VBB VCC VEE Func...