RTAX2000S

v5.3 www.DataSheet4U.com RTAX-S/SL RadTolerant FPGAs Radiation Performance SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy (TMR) – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case Geosynchronous Orbit Expected SRAM Upset Rate of <10-10 Errors/Bit-Day with Use of Error Detection and Correction (EDAC) IP (included) with Integrated SRAM Scrubber – Single-Bit Correction, Double-Bit Detection – Variable-Rate Background Refreshing Total Ionizing Dose Up to 300 krad (Si, Functional) Single-Event Latch-Up Immunity (SEL) to LETTH > 117 MeVcm2/mg TM1019 Test Data Available Single Event Transient (SET) – No Anomalies up to 150 MHz Leading-Edge Performance High-Performance Embedded FIFOs 350+ MHz System Performance 500+ MHz Internal Performance 700 Mb/s LVDS Capable I/Os Specifications Up to 4 Million Equivalent System Gates or 500 k Equivalent ASIC Gates Up to 20,160 SEU-Hardened Flip-Flops Up to 840 I/Os Up to 540 kbits Embedded SRAM Manufactured on Advanced 0.15 μm CMOS Antifuse Process Technology, 7 Layers of Metal Electrostatic Discharge (ESD) is 2,000 V (HBM MIL-STD-883, TM3015) Processing Flows B-Flow – MIL-STD-883B E-Flow – Actel Extended Flow EV-Flow – Class V Equivalent Flow Processing Consistent with MIL-PRF 38535 Features Single-Chip, Nonvolatile Solution 1.5 V Core Voltage for Low Power Flexible, Multi-Standard I/Os: – 1.5 V, 1.8 V, 2.5 V, 3.3 ...