Document
IP3088CX5; IP3088CX10; IP3088CX15; IP3088CX20
Rev. 01 — 12 February 2010
www.DataSheet4U.com
Integrated 2, 4, 6 and 8-channel passive LC-filter network with ESD protection to IEC 61000-4-2 level 4
Product data sheet
1. Product profile
1.1 General description
IP3088CX5, IP3088CX10, IP3088CX15 and IP3088CX20 is a 2, 4, 6 and 8-channel LC low-pass filter array family which is designed to provide filtering of undesired RF signals on the I/O ports of portable communication or computing devices. In addition, IP3088CX5, IP3088CX10, IP3088CX15 and IP3088CX20 incorporates diodes to provide protection to downstream components from ElectroStatic Discharge (ESD) voltages as high as ±15 kV according IEC 61000-4-2 level 4. The devices are fabricated using monolithic silicon technology and integrate and incorporate up to 16 coils and 24 diodes in a 0.5 mm pitch Wafer-Level Chip-Scale Package (WLCSP).
1.2 Features and benefits
Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant) Integrated 2, 4, 6 and 8-channel π-type LC-filter network 18 Ω channel series resistance; ≤ 45 pF (at 2.5 V DC) channel capacitance Integrated ESD protection withstanding ±15 kV contact discharge, far exceeding IEC 61000-4-2 level 4 ESD protection to ±30 kV contact discharge, per MIL-STD-883D, Method 3 015 WLCSP with 0.5 mm pitch
1.3 Applications
Cellular and Personal Communication System (PCS) mobile handsets Cordless telephones Wireless data (WAN/LAN) systems and PDAs
NXP Semiconductors
www.DataSheet4U.com IP3088CX5/CX10/CX15/CX20
2, 4, 6 and 8-channel passive LC-filter network with ESD protection
2. Pinning information
2.1 Pinning
bump A1 index area 1 A B C
001aak061
bump A1 index area 2 A B1 B C
001aak062
1
2
3
4
B1
B2
transparent top view, solder balls facing down
transparent top view, solder balls facing down
Fig 1.
Pin configuration IP3088CX5
bump A1 index area 1 A B C
001aak063
Fig 2.
Pin configuration IP3088CX10
bump A1 index area 2 3 4 5 6 A B1 B2 B3 B C
001aak064
1
2
3
4
5
6
7
8
B1
B2
B3
B4
transparent top view, solder balls facing down
transparent top view, solder balls facing down
Fig 3.
Pin configuration IP3088CX15
Fig 4.
Pin configuration IP3088CX20
2.2 Pin description
Table 1. Pin IP3088CX5 A1 and C1 A2 and C2 B1 IP3088CX10 A1 and C1 A2 and C2 A3 and C3 A4 and C4 B1 and B2 IP3088CX15 A1 and C1 A2 and C2 A3 and C3 A4 and C4 A5 and C5 A6 and C6 B1, B2 and B3 IP3088CX20 A1 and C1 A2 and C2 A3 and C3 A4 and C4 A5 and C5 A6 and C6 A7 and C7 A8 and C8 B1, B2, B3 and B4 filter channel 1 filter channel 2 filter channel 3 filter channel 4 filter channel 5 filter channel 6 filter channel 7 filter channel 8 ground Pinning Description
IP3088CX5_CX10_CX15_CX20_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 12 February 2010
2 of 15
NXP Semiconductors
www.DataSheet4U.com IP3088CX5/CX10/CX15/CX20
2, 4, 6 and 8-channel passive LC-filter network with ESD protection
3. Ordering information
Table 2. Ordering information Package Name IP3088CX5 IP3088CX10 IP3088CX15 IP3088CX20 WLCSP5 WLCSP10 WLCSP15 WLCSP20 Description wafer level chip-size package; 5 bumps; 0.96 × 1.28 × 0.65 mm wafer level chip-size package; 10 bumps; 1.96 × 1.28 × 0.65 mm wafer level chip-size package; 15 bumps; 2.96 × 1.28 × 0.65 mm wafer level chip-size package; 20 bumps; 3.96 × 1.28 × 0.65 mm Version IP3088CX5 IP3088CX10 IP3088CX15 IP3088CX20 Type number
4. Functional diagram
A1 to A8 C1 to C8
B1 to B4
008aaa184
Fig 5.
Schematic diagram IP3088CX5; IP3088CX10; IP3088CX15; IP3088CX20
5. Limiting values
Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC VESD Parameter supply voltage electrostatic discharge voltage all pins to ground contact discharge air discharge IEC 61000-4-2 level 4; all pins to ground contact discharge air discharge MIL-STD-883D (method 3 015) HBM contact discharge Ich Tstg Tamb
[1]
[1] [1]
Conditions
Min −0.5 −15 −15
Max +5.6 +15 +15
Unit V kV kV
−8 −15 −30 −65 −40
+8 +15 +30 30 +150 +85
kV kV kV mA °C °C
channel current (DC) storage temperature ambient temperature
per inductor; Tamb = 85 °C
Device is qualified with 1 000 pulses of ±15 kV contact discharges each, according to the IEC 61000-4-2 model and far exceeds the specified level 4 (8 kV contact discharge).
IP3088CX5_CX10_CX15_CX20_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 12 February 2010
3 of 15
NXP Semiconductors
www.DataSheet4U.com IP3088CX5/CX10/CX15/CX20
2, 4, 6 and 8-channel passive LC-filter network with ESD protection
6. Characteristics
Table 4. Channel characteristics Tamb = 25 °C; unless otherwise specified. Symbol Parameter Rs(ch) Ls(ch) Cch channel series resistance channel series inductance channel capacitance Vbias(DC) = 0 V; .