Document
PCF2128
Integrated RTC / TCXO / Crystal
Rev. 00.03 — 4 June 2007
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Preliminary [short] data sheet
1. General description
The PCF2128 is a ready to run CMOS real time clock/calendar with an integrated temperature compensated crystal oscillator (TCXO). In timekeeping applications the high accuracy of the PCF2128 allows it to be used as a replacement for costly and higher powered long wave receivers or GPS receivers. A programmable battery switch-over circuit enables an uninterruptible power supply and consequently continuous timekeeping. The PCF2128 additionally features 512 bytes of general purpose RAM, a programmable watchdog, a time stamp facility and a voltage monitoring facility. Programming is possible using either an SPI or an I2C-bus interface.
2. Features
Integration of a 32.768 kHz quartz crystal in the same package as the RTC temperature compensated crystal oscillator (TCXO) with integrated capacitors. accuracy: typically 3 ppm from−20 °C to +70 °C, typically 5 ppm from −40 °C to +85 °C provides year, month, day, weekday, hours, minutes and seconds programmable alarm function with interrupt capability programmable countdown timer with interrupt capability programmable watchdog timer with interrupt and reset capability 512 bytes of general purpose static RAM 1 second or 1 minute interrupt output
oscillator stop detection
two line bi-directional 1 MHz fast mode plus I2C interface timestamp input power-on reset 3 line SPI interface with separate data input and output (maximum speed 6.5 Mbits/s) programmable square wave output pin
timestamp function with interrupt capability battery backup input pin and switch-over I2C-bus slave address: read A3H and circuitry write A2H extra power fail detection with input and clock operating voltage: to 5.5 V output pins battery low detection low backup current; typical 0.95 μA at VDD = 3.0 V and Tamb = 25 °C battery backed output voltage pin selectable I2C and SPI interface
NXP Semiconductors
PCF2128
Real www.DataSheet4U.com time clock / calendar
3. Quick reference data
Table 1. Quick reference data VDD = 1.8 to 5.5 V; VSS = 0 V; Tamb = −40 to +85 °C unless otherwise specified. Symbol VDD IDD Parameter supply voltage supply current interface active fSCL = 6.5 MHz fSCL = 1.0 MHz interface inactive (fSCL = 0 kHz) timekeeping and power management configuration, CLKOUT disabled; VDD = 5.0 V VDD = 3.0 V interface inactive (fSCL = 0 kHz) timekeeping configuration; Tamb = +25 °C VDD = 5.0 V VDD = 3.0 V fSCL Δf / f Tamb Tstg SCL clock frequency frequency stability (fo = 32.768 kHz) ambient temperature storage temperature Tamb = −40 to +85 °C Tamb = −20 to +70 °C operating 0 −40 −65 850 450 ±5 ±3 6.5 ±5 +85 +150 nA nA MHz ppm ppm °C °C 2700 2100 nA nA 800 200 μA μA Conditions Min 1.8 Typ Max 5.5 Unit V
4. Ordering information
Table 2: Ordering information Package Name SO20 Description plastic thin shrink small outline package; 20 leads; body width 4.4mm Version SOT163-1 Type number Topside mark PCF2128T / 1 PCF2128T
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
2 of 10
NXP Semiconductors
PCF2128
Real www.DataSheet4U.com time clock / calendar
5. Block diagram
INT 17 OSCI
32.768 kHz
TCXO DIVIDER AND TIMER CONTROL 1 CONTROL 2 CONTROL 3 SECONDS 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D
OSCO CLKOUT VOUT VDD VBAT VSS 7
18 20 19 8 BATTERY BACK UP SWITCH-OVER CIRCUITRY internal power supply
MINUTES TEMP 1 Hz HOURS DAYS LOGIC CONTROL WEEKDAYS MONTHS YEARS OSCILLATOR MONITOR RESET SECOND ALARM MINUTE ALARM HOUR ALARM ADDRESS REGISTER DAY ALARM WEEKDAY ALARM CLOCKOUT CONTROL TIMER CONTROL COUNTDOWN TIMER
RST SDA/CE SDO SDI SCL
16 4 3 2 1 SERIAL BUS INTERFACE
IFS
5
INTERFACE SELECTORS
1/16 SECOND TIMESTAMP SECOND TIMESTAMP MINUTE TIMESTAMP
SCL SDA/CE TS 6
I2C BUS INTERFACE
HOUR TIMESTAMP DAY TIMESTAMP MONTH TIMESTAMP
SCL SDO SDI SDA/CE 15 1.25 V (internal) 14 PFO TEMPERATURE SENSOR 13 TEST 512 BYTES STATIC RAM
YEAR TIMESTAMP CRYSTAL AGING OFFSET RAM ADDRESS MSB RAM ADDRESS LSB RAM WRITE
PFI
TEMP
RAM READ
001aag059_02
Fig 1. Block diagram of PCF2128
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
3 of 10
NXP Semiconductors
PCF2128
Real www.DataSheet4U.com time clock / calendar
6. Pinning information
6.1 Pinning
SCL SDI SDO SDA/CE IFS TS CLKOUT VSS n.c.
1 2 3 4 5 6 7 8 9
20 VDD 19 VBAT 18 VOUT 17 INT 16 RST 15 PFI 14 PFO 13 TEST 12 n.c. 11 n.c.
001aag060
die
oscillator
PCF2128
n.c. 10
001aag576
Fig 2. Pin configuration SO20 Table 3: Symbol SCL Pin description PCF2128 Pin 1 Description combined serial clock input for both and SPI interface. May float when CE inactive. I2C
Fig 3. SO20 (3d)
Symbol VDD
Pin 20
Description positive supply voltage
SDI SDO SDA / CE
2 3 4
serial data input for SPI .