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HYMD512G726A4-K

Hynix Semiconductor

Registered DDR SDRAM DIMM

128Mx72 bits HYMD512G726A(L)4-M/K/H/L Document Title 128M x 72 bits Registered DDR SDRAM DIMM www.DataSheet4U.com Regi...


Hynix Semiconductor

HYMD512G726A4-K

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Description
128Mx72 bits HYMD512G726A(L)4-M/K/H/L Document Title 128M x 72 bits Registered DDR SDRAM DIMM www.DataSheet4U.com Registered DDR SDRAM DIMM Revision History No. 0.1 0.2 1) Defined Target Spec. 1) Defined pin cap. spec. 2) Modified IDD current spec 3) Deleted preliminary. History Draft Date Jan. 2003 Feb. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.2 / Feb. 2004 1 128Mx72 bits HYMD512G726A(L)4-M/K/H/L DESCRIPTION www.DataSheet4U.com Registered DDR SDRAM DIMM Hynix HYMD512G726A(L)4-M/K/H/L series is registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 128Mx72 high-speed memory arrays. HYMD512G726A(L)4-M/K/ H/L series consists of eighteen 128Mx4 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD512G726A(L)4-M/K/H/L series provide a high performance 8-byte interface in 5.25" width form factor of industry standard. It is suitable for easy interchange and addition. Hynix HYMD512G726A(L)4-M/K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both r...




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