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LX128V-32FN208C

Lattice Semiconductor

High Performance Interfacing and Switching

ispGDX2™ Family September 2005 www.DataSheet4U.com Features Includes High, Performance t os -C w Lo “E-Series” High ...


Lattice Semiconductor

LX128V-32FN208C

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ispGDX2™ Family September 2005 www.DataSheet4U.com Features Includes High, Performance t os -C w Lo “E-Series” High Performance Interfacing and Switching Data Sheet ■ Two Options Available High-performance sysHSI (standard part number) Low-cost, no sysHSI (“E-Series”) ■ High Performance Bus Switching High bandwidth – Up to 12.8 Gbps (SERDES) – Up to 38 Gbps (without SERDES) Up to 16 (15x10) FIFOs for data buffering High speed performance – fMAX = 360MHz – tPD = 3.0ns – tCO = 2.9ns – tS = 2.0ns Built-in programmable control logic capability I/O intensive: 64 to 256 I/Os Expanded MUX capability up to 188:1 MUX ■ sysHSI Blocks Provide up to 16 High-speed Channels Serializer/de-serializer (SERDES) included Clock Data Recovery (CDR) built in 800 Mbps per channel LVDS differential support 10B/12B support – Encoding / decoding – Bit alignment – Symbol alignment 8B/10B support – Bit alignment – Symbol alignment Source Synchronous support ■ sysCLOCK™ PLL Frequency synthesis and skew management Clock multiply and divide capability Clock shifting up to +/-2.35ns in 335ps steps Up to four PLLs ■ Flexible Programming and Testing IEEE 1532 compliant In-System Programmability (ISP™) Boundary scan test through IEEE 1149.1 interface 3.3V, 2.5V or 1.8V power supplies 5V tolerant I/O for LVCMOS 3.3 and LVTTL interfaces ■ sysIO™ Interfacing LVCMOS 1.8, 2.5, 3.3 and LVTTL support for standard board interfaces SSTL 2/3 Class I and II supp...




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