CY241V08A-04

CY241V08A-01,04 CY241V8A-01 MPEG Clock Generator with VCXO MPEG Clock Generator with VCXO Features ■ Integrated Phase-Locked Loop (PLL) ■ Low Jitter, High Accuracy Outputs ■ VCXO with Analog Adjust ■ 3.3 V Operation ■ Compatible with MK3727 (–1, –4) ■ Application compatibility for a wide variety of Designs ■ Enables Design compatibility ■ Lower Drive Strength settings (CY241V08A–04) Benefits ■ Digital VCXO control ■ Second source for existing designs ■ Highest performance PLL tailored for multimedia applications ■ Meets critical timing requirements in complex system designs Functional Description For a complete list of related documentation, click here. CY241V08A-01, -04 Logic Block Diagram Not Recommended for New Designs Selector Guide Part Number CY241V08A-01 CY241V08A-04 Outputs Input Frequency Range 1 13.5 MHz pullable crystal input according to Cypress specification 1 13.5 MHz pullable crystal input according to Cypress specification Output Frequencies VCXO Control Curve 1 copy of 27 MHz linear 1 copy of 27 MHz linear Other Features Compatible with MK3727 Same as CY241V08A-01 except lower drive strength settings Cypress Semiconductor Corporation 198 Champion Court Document Number: 38-07656 Rev. *K San Jose, CA 95134-1709 408-943-2600 Revised June 22, 2020 Not Recommended for New Designs Pin Configurations Figure 1. 8-pin SOIC pinout CY241V08A-01, -04 CY241V08A-01,04 CY241V8A-01 Pin Descriptions Name XIN VDD VCXO VSS 27 MHz NC/VDD NC/VSS XOUT ...