TC74HC74AF

TC74HC74AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC74AP, TC74HC74AF Dual D-Type Flip Flop Preset and Clear The TC74HC74A is a high speed CMOS D FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of the CLOCK pulse. CLEAR and PRESET are independent of the CLOCK and are accomplished by setting the appropriate input to an “L” level. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features High speed: fmax = 77 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 2 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Output drive capability: 10 LSTTL loads Symmetrical output impedance: |IOH| = IOL = 4 mA (min) Balanced propagation delays: tpLH ∼− tpHL Wide operating voltage range: VCC (opr) = 2 to 6 V Pin and function compatible with 74LS74 Pin Assignment TC74HC74AP TC74HC74AF Weight DIP14-P-300-2.54 SOP14-P-300-1.27A : 0.96 g (typ.) : 0.18 g (typ.) Start of commercial production 1986-05 1 2014-03-01 IEC Logic Symbol Truth Table Inputs CLR PR D L H X H L X L L X H H L H H H H H X X: Don’t care Outputs CK Q Q Function X L H Clear X H L Preset X H H ⎯ L H ⎯ H L ⎯ Qn Qn No Change System Diagram...