M36D0R6040B0

www.DataSheet4U.com M36D0R6040T0 M36D0R6040B0 64 Mbit (4Mb x16, Multiple Bank, Page) Flash Memory and 16 Mbit (1Mb x16) PSRAM, Multi-Chip Package FEATURES SUMMARY MULTI-CHIP PACKAGE – 1 die of 64 Mbit (4Mb x 16) Flash Memory – 1 die of 16 Mbit (1Mb x 16) Pseudo SRAM ■ SUPPLY VOLTAGE – VDDF = VDDP = 1.7V to 1.95V ■ LOW POWER CONSUMPTION ■ ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Device Code (Top Flash Configuration), M36D0R6040T0: 8810h – Device Code (Bottom Flash Configuration), M36D0R6040B0: 8811h ■ PACKAGE – Compliant with Lead-Free Soldering Processes – Lead-Free Versions FLASH MEMORY ■ PROGRAMMING TIME – 8µs by Word typical for Fast Factory Program – Double/Quadruple Word Program option – Enhanced Factory Program options ■ MEMORY BLOCKS – Multiple Bank Memory Array: 4 Mbit Banks – Parameter Blocks (Top location) ■ ASYNCHRONOUS READ – Asynchronous Page Read mode – Random Access: 70ns ■ DUAL OPERATIONS – Program Erase in one Bank while Read in others – No delay between Read and Write operations ■ BLOCK LOCKING – All blocks locked at Power-up – Any combination of blocks can be locked – WPF for Block Lock-Down ■ Figure 1. Package FBGA Stacked TFBGA67 (ZAI) 12 x 8mm SECURITY – 128-bit user programmable OTP cells – 64-bit unique device number ■ COMMON FLASH INTERFACE (CFI) ■ 100,000 PROGRAM/ERASE CYCLES per BLOCK PSRAM ■ ACCESS TIME: 70ns ■ LOW STANDBY CURRENT: 110µA ■ DEEP POWER DOWN CURRENT: 10µA ■ December 2004 1/18 www.DataSheet4U.com M36D0R6040T0, M36D0R604...