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STD60NF55LA
N-channel 55V - 0.012Ω - 60A - DPAK STripFET™ II Power MOSFET
General features
Type STD60NF55LA
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VDSS 55V
RDS(on) <0.015Ω
ID 60A
Low threshold drive
1
DPAK
3
Description
This Power MOSFET is the latest development of STMicroelectronics unique “single feature size™” strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
Internal schematic diagram
Applications
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Switching application
Order codes
Part number STD60NF55LAT4 Marking D60NF55LA Package DPAK Packaging Tape & reel
September 2006
Rev 2
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Contents
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STD60NF55LA
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6
3 4 5 6
Test circuit
................................................ 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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STD60NF55LA
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Electrical ratings
1
Electrical ratings
Table 1.
Symbol VDS VGS ID ID IDM
(1)
Absolute maximum ratings
Parameter Drain-source voltage (VGS = 0) Gate- source voltage Drain current (continuous) at TC = 25°C Drain current (continuous) at TC = 100°C Drain current (pulsed) Total dissipation at TC = 25°C Derating Factor Value 55 ± 15 60 42 240 110 0.73 16 400 -55 to 175 Max. operating junction temperature Unit V V A A A W W/°C V/ns mJ °C
Ptot dv/dt(2) EAS
(3)
Peak diode recovery voltage slope Single pulse avalanche energy Storage temperature
Tstg Tj
1. Pulse width limited by safe operating area. 2. ISD ≤40A, di/dt ≤350A/µs, VDD ≤V(BR)DSS, Tj ≤TJMAX. 3. Starting Tj = 25 oC, ID = 17.5A, VDD =24V
Table 2.
Rthj-case Rthj-amb
Thermal data
Thermal resistance junction-case max Thermal resistance junction-to ambient max 1.36 100 °C/W °C/W
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Electrical characteristics
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STD60NF55LA
2
Electrical characteristics
(TCASE=25°C unless otherwise specified) Table 3.
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) ID(on)
On/off states
Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate-body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance On state drain current Test conditions ID = 250µA, VGS =0 VDS = Max rating VDS = Max rating,@125°C VGS = ± 15V VDS = VGS, ID = 250µA VGS = 10V, ID = 30A VGS = 5V, ID = 30A VGS = 3.5V, VDS >12V -55°C < Tj < 150°C 35 1 0.012 0.014 Min. 55 1 10 ±100 2 0.015 0.017 Typ. Max. Unit V µA µA nA V Ω Ω A
Table 4.
Symbol gfs (1) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Total gate charge Gate-source charge Gate-drain charge Test conditions VDS = 10V, ID = 30A Min. Typ. 35 1950 390 130 30 180 80 35 40 10 20 56 Max. Unit S pF pF pF ns ns ns ns nC nC nC
VDS = 25V, f = 1MHz, VGS = 0
VDD = 25V, ID = 30A RG = 4.7Ω VGS = 4.5V (see Figure 13) VDD = 40V, ID = 60A, VGS = 5V, RG = 4.7Ω (see Figure 14)
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
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STD60NF55LA
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Table 5.
Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage ISD = 60A, VGS = 0 65 130 4 Test conditions Min. Typ. Max. 60 240 1.3 Unit A A V ns nC A
Reverse recovery time ISD = 40A, di/dt = 100A/µs, Reverse recovery charge VDD = 25V, Tj = 150°C Reverse recovery current (see Figure 15)
1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
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Electrical characteristics
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STD60NF55LA
2.1
Figure 1.
Electrical characteristics (curves)
Safe operating area Figure 2. Thermal impedance
Figure 3.
Output characterisics
Figure 4.
Transfer characteristics
Figure 5.
Transconductance
Figure 6.
Static drain-source on resistance
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STD60NF55LA Figure 7. Gate charge vs gate-source voltage Figure 8.
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Capacitance variations
Figure 9.
Normalized gate threshold voltage vs temperature
Figure 10. Normalized on resistance vs temperature
Figure 11. Source-drain diode forward characteristics
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Electrical characteristics Figure 12. Allowable IAV vs time in avalanche
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STD60NF55LA
The previous curve gives the safe operating area for unclamped.