MC14053B. 14053B Datasheet

14053B MC14053B. Datasheet pdf. Equivalent

14053B Datasheet
Recommendation 14053B Datasheet
Part 14053B
Description MC14053B
Feature 14053B; MC14051B, MC14052B, MC14053B Analog Multiplexers/Demultiplexers The MC14051B, MC14052B, and MC1405.
Manufacture ON Semiconductor
Datasheet
Download 14053B Datasheet





ON Semiconductor 14053B
MC14051B, MC14052B,
MC14053B
Analog
Multiplexers/Demultiplexers
The MC14051B, MC14052B, and MC14053B analog multiplexers
are digitally−controlled analog switches. The MC14051B effectively
implements an SP8T solid state switch, the MC14052B a DP4T, and
the MC14053B a Triple SPDT. All three devices feature low ON
impedance and very low OFF leakage current. Control of analog
signals up to the complete supply voltage range can be achieved.
Features
Triple Diode Protection on Control Inputs
Switch Function is Break Before Make
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Analog Voltage Range (VDD − VEE) = 3.0 to 18 V
Note: VEE must be VSS
Linearized Transfer Characteristics
Low−noise − 12 nV/Cycle, f 1.0 kHz Typical
Pin−for−Pin Replacement for CD4051, CD4052, and CD4053
For 4PDT Switch, See MC14551B
For Lower RON, Use the HC4051, HC4052, or HC4053
High−Speed CMOS Devices
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD DC Supply Voltage Range
(Referenced to VEE, VSS VEE)
−0.5 to +18.0 V
Vin, Input or Output Voltage Range
−0.5 to VDD + 0.5 V
Vout (DC or Transient) (Referenced to VSS for
Control Inputs and VEE for Switch I/O)
Iin Input Current (DC or Transient)
per Control Pin
+10
mA
ISW Switch Through Current
±25
mA
PD Power Dissipation per Package (Note 1)
500
mW
TA Ambient Temperature Range
−55 to +125
°C
Tstg Storage Temperature Range
−65 to +150
°C
TL Lead Temperature (8−Second Soldering)
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Packages: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained to
the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either
VSS, VEE or VDD). Unused outputs must be left open.
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SOIC−16
D SUFFIX
CASE 751B
1
TSSOP−16
DT SUFFIX
CASE 948F
MARKING DIAGRAMS
16
1405xBG
AWLYWW
1
SOIC−16
16
14
05xB
ALYWG
G
1
TSSOP−16
x
A
WL, L
Y
WW, W
G or G
= 1, 2, or 3
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
1
August, 2014 − Rev. 14
Publication Order Number:
MC14051B/D



ON Semiconductor 14053B
MC14051B, MC14052B, MC14053B
MC14051B
8−Channel Analog
Multiplexer/Demultiplexer
MC14052B
Dual 4−Channel Analog
Multiplexer/Demultiplexer
MC14053B
Triple 2−Channel Analog
Multiplexer/Demultiplexer
6
CONTROLS 11
10
9
13
14
15
SWITCHES 12
IN/OUT
1
5
2
4
INHIBIT
A
B
C
X0
X1
X2
X
X3
X4
X5
X6
X7
3
COMMON
OUT/IN
6
CONTROLS 10
9
12
14
15
SWITCHES 11
IN/OUT
1
5
2
4
INHIBIT
A
B
X
X0
X1
X2
X3
Y0
Y1 Y
Y2
Y3
13
COMMONS
OUT/IN
3
6
CONTROLS 11
10
9
12
13
SWITCHES 2
IN/OUT
1
5
3
INHIBIT
A
X
B
C
X0 Y
X1
Y0
Y1
Z0 Z
Z1
VDD = PIN 16
VSS = PIN 8
VEE = PIN 7
VDD = PIN 16
VSS = PIN 8
VEE = PIN 7
VDD = PIN 16
VSS = PIN 8
VEE = PIN 7
Note: Control Inputs referenced to VSS, Analog Inputs and Outputs reference to VEE. VEE must be VSS.
14
15 COMMONS
OUT/IN
4
MC14051B
X4 1
X6 2
16 VDD
15 X2
X3
14 X1
X7 4
13 X0
X5 5
12 X3
INH 6
11 A
VEE 7
VSS 8
10 B
9C
PIN ASSIGNMENT
MC14052B
Y0 1
Y2 2
16 VDD
15 X2
Y3
14 X1
Y3 4
13 X
Y1 5
12 X0
INH 6
11 X3
VEE 7
VSS 8
10 A
9B
MC14053B
Y1 1
Y0 2
16 VDD
15 Y
Z1 3
14 X
Z4
13 X1
Z0 5
12 X0
INH 6
11 A
VEE 7
VSS 8
10 B
9C
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ON Semiconductor 14053B
MC14051B, MC14052B, MC14053B
ELECTRICAL CHARACTERISTICS
−55_C
25_C
125_C
Characteristic
Symbol VDD
Test Conditions
SUPPLY REQUIREMENTS (Voltages Referenced to VEE)
Power Supply Voltage
Range
VDD
− VDD – 3.0 VSS VEE
Typ
Min Max Min (Note 2) Max Min Max Unit
3.0 18 3.0
18 3.0 18 V
Quiescent Current Per
Package
IDD 5.0 Control Inputs:
− 5.0 −
10 Vin = VSS or VDD,
− 10 −
15 Switch I/O: VEE v VI/O v
20
VDD, and DVswitch v
500 mV (Note 3)
0.005 5.0 − 150 mA
0.010
10
− 300
0.015
20
− 600
Total Supply Current
(Dynamic Plus
Quiescent, Per Package
ID(AV)
5.0 TA = 25_C only (The
10 channel component,
15 (Vin – Vout)/Ron, is
not included.)
Typical
(0.07 mA/kHz) f + IDD
(0.20 mA/kHz) f + IDD
(0.36 mA/kHz) f + IDD
mA
CONTROL INPUTS — INHIBIT, A, B, C (Voltages Referenced to VSS)
Low−Level Input Voltage
VIL
5.0 Ron = per spec,
10 Ioff = per spec
15
− 1.5 −
− 3.0 −
− 4.0 −
2.25
1.5 − 1.5 V
4.50
3.0 − 3.0
6.75
4.0 − 4.0
High−Level Input Voltage
VIH
5.0 Ron = per spec,
10 Ioff = per spec
15
3.5 − 3.5
2.75
7.0 − 7.0
5.50
11 − 11
8.25
− 3.5 −
V
− 7.0 −
− 11 −
Input Leakage Current
Iin
15 Vin = 0 or VDD
±0.1 − ±0.00001 ±0.1 − 1.0 mA
Input Capacitance
Cin
5.0
7.5 −
− pF
SWITCHES IN/OUT AND COMMONS OUT/IN — X, Y, Z (Voltages Referenced to VEE)
Recommended
Peak−to−Peak Voltage
VI/O
− Channel On or Off
Into or Out of the Switch
0 VDD 0
VDD 0 VDD VPP
Recommended Static or DVswitch − Channel On
Dynamic Voltage Across
the Switch (Note 3)
(Figure 5)
Output Offset Voltage
ON Resistance
VOO
Ron
− Vin = 0 V, No Load
5.0 DVswitch v 500 mV
10 (Note 3) Vin = VIL or VIH
15 (Control), and Vin =
0 to VDD (Switch)
DON Resistance Between DRon 5.0
Any Two Channels in the
10
Same Package
15
0 600 0
− 800 −
− 400 −
− 220 −
− 70 −
− 50 −
− 45 −
600 0 300 mV
10
mV
250 1050 − 1200 W
120
500 − 520
80
280 − 300
25
70 − 135 W
10
50 − 95
10
45 − 65
Off−Channel Leakage
Current (Figure 10)
Ioff
15 Vin = VIL or VIH
(Control) Channel to
Channel or Any One
Channel
±100 −
±0.05 ±100 − ±1000 nA
Capacitance, Switch I/O
CI/O
Capacitance, Common O/I CO/I
− Inhibit = VDD
− Inhibit = VDD
(MC14051B)
(MC14052B)
(MC14053B)
10
− pF
pF
60
32
17
Capacitance, Feedthrough CI/O
(Channel Off)
− Pins Not Adjacent
− Pins Adjacent
0.15
− pF
0.47
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Data labeled “Typ” is not to be used for design purposes, but is intended as an indication of the IC’s potential performance.
3. For voltage drops across the switch (DVswitch) > 600 mV (> 300 mV at high temperature), excessive VDD current may be drawn, i.e. the
current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the
Maximum Ratings are exceeded. (See first page of this data sheet.)
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