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Display Driver. KCD-A300-QB Datasheet |
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KOPIN
A300 Dispwlawyw.DDartaiSvheeret4U.com
Part number: KCD-A300-QB
(August. 09, 2006)
General Description
The A300 is a driver for Kopin’s CyberDisplay®
300M LV monochrome display. It is designed to
accept a standard monochrome video signal (525
or 625 lines), and convert it for the display.
The A300 provides all necessary power supply
voltages to the display panel by means of charge
pump circuits. The input video signal is
converted to appropriate differential video
signals required by the LCD Display Panel.
A separate on screen display (OSD) input is
provided. An on-chip sync separator, Digital
PLL, and logic control section generate the
appropriate horizontal and vertical timing signals
for the LCD panel.
Block Diagram
Features
Support for 525 and 625 line Monochrome
systems
Integrated DC-DC converter provides all
necessary voltages for the LCD display
panel
Internal sync separator, PLL, and Logic
provide all necessary timing signals to the
LCD display panel
Gamma bias to adjust the video output
characteristics
Hsync Recovery
Battery Voltage ; 2.5V ~ 3.6V
Power down mode
48LQFP
OSD_IN
WT_SEL
EXTWT
BKLVL
VIN
VBG
VSSD
VSSA2
VSSA3
VBBA
OSD
LEVEL
DETECT
VBAT
V33IN
DC
RESTORE
Internal
White
OSD
MUX
REFERENCE
GEN.
SYNC
SEPERATOR
V
H
DPLL
GAMMA
&
GAIN
POWER
DOWN
CONTROL
Q PUMP 3
(BACKLIGHT)
Q PUMP 2
(DISPLAY)
_
+
TIMING
CONTROL
VGAIN
VGAMMA
VID0
VID1
PDRB
CK0
CK1
HS
VS
INV
EXTCLK
V1X_SEL
INV1
INV0
1
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Pin Descriptions
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14,15
Symbol
REFO
OSD_IN
EXTWT
BKLVL
VIN
VBG
WT_SEL
VSSA1
VBBA
PDB
Test_mode 1
N.C
VSSD
FD0, FD1
16 SKIPLIN
17 PAL_MODE
18 Test_mode 0
19,20 INV0 / INV1
21
22
23
24
25
26,27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
V1X_SEL
EXTCLK
INV
HS
VS
CK0 / CK1
VSSA2
VID1
VGAMMA
VGAIN
VID0
PDRB
ISINK
VSSA3
FB_REF
PRE_QP3
CLK_QP3
V33IN
N.C
N.C
N.C
ENB_QP3
VBAT
CLKB
CLKA
N.C
FB5V
Description
VREF Buffer Output
Input for the OSD Signals
Input for External White Level
Black level input
Input for standard level monochrome video
Internally generated voltage reference
Input for external (Low) or internal white level select
Analog ground
Substrate power
Power down (Active low)
Test input pin
No Connection
Digital ground
Field delay control,
FD0: delay even field by one row
FD1: delay odd field by one row
Line skipping mode for PAL vertical scaling
NTSC / PAL select,
NTSC: low, PAL: high
Test input pin
Inversion control, INV0 INV1
0 0 Frame mode
0 1 Pixel mode
1 0 Column mode
1 1 Row mode
Vertical 1x at ‘high’ state, 2x Inversion control at ‘low’ state
Clock input pin for test
Inversion control output
Horizontal output signal
Vertical output signal
Pixel clock output 0/1
Analog ground
Upper video drive signal to the LCD panel
Gamma bias adjust
Gain bias adjust
Lower video drive signal to the LCD panel
Power down reset output to the LCD panel (Active low)
LED current control
Analog ground
Sink current control
QPUMP3 clock buffer output
QPUMP3 clock buffer output
3.3V regulated power supply
No Connection
No Connection
No Connection
QPUMP3 enable input (Active low)
Battery input
QPUMP2 clock buffer output
QPUMP2 clock buffer output
No Connection
QPUMP2 voltage feedback
2
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