128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O
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128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O
Specification of 128M (8Mx16bit) Mobile SDRA...
Description
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128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O
Specification of 128M (8Mx16bit) Mobile SDRAM
Memory Cell Array
- Organized as 4banks of 2,097,152 x16
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.2 /Aug. 2009 1
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128Mbit (8Mx16bit) Mobile SDR Memory H55S1262EFP Series
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Document Title
4Bank x 2M x 16bits Synchronous DRAM
Revision History
Revision No. 0.1 0.2 Initial Draft - Define IDD specification -. Correct Temp range(p.9 & p.10) -. Modify IDD Values(p.11 & p.12) -. Omit a typo in a package inforamtion -. Modify package information(add tolerance) History Draft Date Sep. 2007 Feb. 2008 Remark Preliminary Preliminary
1.0
Jun. 2008
1.1 1.2
Jul. 2009 Aug. 2009
Rev 1.2 /Aug. 2009
2
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128Mbit (8Mx16bit) Mobile SDR Memory H55S1262EFP Series
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DESCRIPTION
The Hynix H55S1262EFP is suited for non-PC application which use the batteries such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, handheld PCs. The Hynix 128M Mobile SDRAM is 134,217,728-bit CMOS Mobile Synchronous DRAM(Mobile SDR), ideally suited for the main memory applications which requires large memory density and high bandwidth. It is organized as 4banks of 2,097,152x16. Mobile SDRAM is a type of DRAM which operates in synchronization with in...
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