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SSM9563GM
P-channel Enhancement-mode Power MOSFET
PRODUCT SUMMARY
BVDSS R DS(ON) ID
DESCRIPTION
The SSM9563GM acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as DC/DC converters and general load-switching circuits. The SSM9563GM is supplied in an RoHS-compliant SO-8 package, which is widely used for medium power commercial and industrial surface mount applications.
-40V 40mΩ -6A
Pb-free; RoHS-compliant SO-8
D D D D G
SO-8
S
S
S
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VGS ID IDM PD TSTG TJ Parameter Drain-source voltage Gate-source voltage Continuous drain current , TC = 25°C TC = 70°C Pulsed drain current
1
3
Value -40 ±25 -6 -4.8 -30 2.5 0.02 -55 to 150 -55 to 150
Units V V A A A W W/°C °C °C
Total power dissipation, TC = 25°C Linear derating factor Storage temperature range Operating junction temperature range
THERMAL CHARACTERISTICS
Symbol RΘ JA Parameter
Maximum thermal resistance, junction-ambient
3
Value
50
Units
°C/W
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%. 3.Mounted on a square inch of copper pad on FR4 board; 125°C/W when mounted on the minimum pad area required for soldering.
9/26/2006 Rev.3.01
www.SiliconStandard.com
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SSM9563GM
ELECTRICAL CHARACTERISTICS
Symbol BVDSS Parameter Drain-source breakdown voltage
Breakdown voltage temperature coefficient
(at Tj = 25°C, unless otherwise specified)
Test Conditions VGS=0V, ID=-250uA Reference to 25°C, ID=-1mA VGS=-10V, ID=-6A VGS=-4.5V, ID=-4A Min. -40 -1 Typ. -0.03 10 19 5 8 12 7 68 38 1600 240 190 Max. Units 40 60 -3 -1 -25 ±100 30 2560 V V/°C mΩ mΩ V S uA uA nA nC nC nC ns ns ns ns pF pF pF
∆ BV DSS/∆ Tj
RDS(ON)
Static drain-source on-resistance2
VGS(th) gfs IDSS
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Gate threshold voltage Forward transconductance
VDS=VGS, ID=-250uA VDS=-10V, ID=-6A
Drain-source leakage current
VDS=-40V, VGS=0V, Tj = 25C
VDS=-32V ,VGS=0V, Tj = 70°C VGS=±25V ID=-6A VDS=-32V VGS=-4.5V VDS=-20V ID=-1A RG=3.3Ω , VGS=-10V RD=20Ω VGS=0V VDS=-25V f=1.0MHz
IGSS Qg
Gate-source leakage current Total gate charge
2
Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Gate-source charge Gate-drain ("Miller") charge Turn-on delay time Rise time Turn-off delay time Fall time Input capacitance Output capacitance Reverse transfer capacitance
2
Source-Drain Diode
Symbol VSD trr Qrr Parameter Forward voltage
2
Test Conditions IS=-2A, VGS=0V IS=-6A, VGS=0V, dI/dt=100A/µs
Min. -
Typ. 37 54
Max. Units -1.2 V ns nC
Reverse-recovery time
2
Reverse-recovery charge
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%.
9/26/2006 Rev.3.01
www.SiliconStandard.com
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SSM9563GM
100 90 90
T A = 25 C
o
-10V -7.0V -ID , Drain Current (A)
80
TA=150 C
o
-10V -7.0V
-ID , Drain Current (A)
80
7.