NB4N11S

NB4N11S 3.3 V 1:2 AnyLevel™ Input to LVDS Fanout Buffer / Translator The NB4N11S is a differential 1:2 Clock or Data Receiver and will accept AnyLevelTM input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and two identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB4N11S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The NB4N11S has a wide input common mode range from GND + 50 mV to VCC − 50 mV. Combined with the 50 W internal termination resistors at the inputs, the NB4N11S is ideal for translating a variety of differential or single−ended Clock or Data signals to 350 mV typical LVDS output levels. The NB4N11S is functionally equivalent to the EP11, LVEP11, SG11 or 7L11M devices and is offered in a small 3 mm X 3 mm 16−QFN package. Application notes, models, and support documentation are available at www.onsemi.com. Features www.DataSheet4U.com http://onsemi.com MARKING DIAGRAM* 16 1 1 QFN−16 MN SUFFIX CASE 485G NB4N 11S ALYW A L Y W = Assembly Location = Wafer Lot = Year = Work Week Maximum Input Clock Frequency > 2.0 GHz Maximum Input Data Rate > 2.5 Gb/s 1 ps Maximum of RMS Clock Jitter Typically 10 ps of Data Dependent Jitter 380 ps Typical Propagation Delay 120 ps Typical Rise and Fall Times Functionally Compatible with Existing 3.3 V LVEL, LVEP, EP, and SG Devices *For additional marki...