PH1875L

PH1875L N-channel TrenchMOS logic level FET Rev. 01 — 29 November 2005 www.DataSheet4U.com Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. 1.2 Features s Logic level threshold s Low thermal resistance s Very low on-state resistance s Surface-mounted package 1.3 Applications s DC motor control s DC-to-DC converters s General purpose power switching 1.4 Quick reference data s VDS ≤ 75 V s RDSon ≤ 16.5 mΩ s ID ≤ 45.8 A s QGD = 15.3 nC (typ) 2. Pinning information Table 1: Pin 1, 2, 3 4 mb Pinning Description source (S) gate (G) mounting base; connected to drain (D) mb D Simplified outline Symbol G mbb076 S 1 2 3 4 SOT669 (LFPAK) Philips Semiconductors PH1875L N-channel TrenchMOS logic level FET www.DataSheet4U.com 3. Ordering information Table 2: Ordering information Package Name PH1875L LFPAK Description plastic single-ended surface mounted package; 4 leads Version SOT669 Type number 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage drain-gate voltage (DC) gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature source current peak source current Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 26 A; tp = 0.11 ...