74LVC1G86

74LVC1G86 2-input EXCLUSIVE-OR gate Rev. 06 — 18 July 2007 www.DataSheet4U.com Product data sheet 1. General description The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features s Wide supply voltage range from 1.65 V to 5.5 V s High noise immunity s Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8B/JESD36 (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V s ±24 mA output drive (VCC = 3.0 V) s CMOS low power consumption s Latch-up performance exceeds 250 mA s Direct interface with TTL levels s Inputs accept voltages up to 5 V s Multiple package options s Specified from −40 °C to +125 °C NXP Semiconductors 74LVC1G86 2-input EXCLUSIVE-OR gate www.DataSheet4U.com 3. Ordering information Table 1. Ordering information Package Temperature range 74LVC1G86GW 74LVC1G86GV 74LVC1G86GM 74LVC1G86GF −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C Name TSSOP5 SC-74A XSON6 XSON6 Description plastic thin shrink small outline package; 5 leads; body width 1.25 mm plastic surface-mounted package; 5 leads plastic extremely t...