DatasheetsPDF.com

IS41LV16257A

Integrated Silicon Solution

256K x 16 (4-MBIT) DYNAMIC RAM

IS41C16257A IS41LV16257A 256K x 16 (4-MBIT) DYNAMIC RAM WITH FAST PAGE MODE FEATURES • • • • • • Fast access and cycle t...


Integrated Silicon Solution

IS41LV16257A

File Download Download IS41LV16257A Datasheet


Description
IS41C16257A IS41LV16257A 256K x 16 (4-MBIT) DYNAMIC RAM WITH FAST PAGE MODE FEATURES Fast access and cycle time TTL compatible inputs and outputs Refresh Interval: 512 cycles/8 ms Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden JEDEC standard pinout Single power supply: -- 5V ± 10% (IS41C16257A) -- 3.3V ± 10% (IS41LV16257A) Byte Write and Byte Read operation via two CAS Lead-free available ISSI APRIL 2005 ® www.DataSheet4U.com DESCRIPTION The ISSI IS41C16257A and the IS41LV16257A are 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memories. Fast Page Mode allows 512 random accesses within a single row with access cycle time as short as 12 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes these devices ideal for use in 16- and 32-bit wide data bus systems. These features make the IS41C16257A and the IS41LV16257A ideally suited for high band-width graphics, digital signal processing, high-performance computing systems, and peripheral applications. The IS41C16257A and the IS41LV16257A are packaged in a 40-pin, 400-mil SOJ and TSOP (Type II). KEY TIMING PARAMETERS Parameter Max. RAS Access Time (tRAC) Max. CAS Access Time (tCAC) Max. Column Address Access Time (tAA) Min. Fast Page Mode Cycle Time (tPC) Min. Read/Write Cycle Time (tRC) -35 35 11 18 14 60 -60 60 15 30 25 110 Unit ns ns ns ns ns Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this ...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)