PI6C48530-01

www.DataSheet4U.com PI6C48530-01 3.3V 1:16 LVPECL Fanout Buffer Product Features Low voltage operation Vcc=3.3V 1:16 fanout Differential input can accept the following: LVDS, LVPECL, LVHSTL, SSTL, HCSL Translates any single-ended input signal to 3.3V LVPECL levels with a resistor bias on nCLK input Pin-to-pin compatible to ICS8530-01 Low Output skew: 75ps Par-to-part skew: 250ps Propagation Delay: 2ns Maximum output frequency: 500MHz 3.3V output operating supply Package available: 48-pin LQFP (FB48) Product Description The PI6C48530-01 is a high performance low skew LVPECL fanout buffer. PI6C48530-01 features a single differential LVPECL or LVDS or LVHSTL or SSTL or HCSL input and sixteen 3.3V LVPECL outputs. The input can accept singleended signal with external bias circuit. The large fanout from a single input line reduces loading on input clock. PI6C4853001 is ideal for both single-ended to LVPECL translations and/or LVPECL clock distribution. Typical applications are clock and signal distribution for data-communications and telecommunications. Pin Description nCLK 37 nQ12 nQ13 nQ14 nQ15 40 Logic Block Diagram 48 47 46 45 44 43 42 41 39 CLK nCLK Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 Q6 nQ6 Q7 nQ7 Q15 nQ15 Q14 nQ14 Q13 nQ13 Q12 nQ12 Q11 nQ11 Q10 nQ10 Q9 nQ9 Q8 nQ8 13 14 15 16 17 18 19 20 21 22 23 VEE Q7 Q6 Q5 VCCO Q4 1 PS8706 VCCO nQ7 nQ6 nQ5 nQ4 VCC 24 VCC0 Q11 nQ11 Q10 nQ10 VEE Q9 nQ9 nQ8 VCCO VCC 38 VCCO V...