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ICS855011 Dataheets PDF



Part Number ICS855011
Manufacturers Integrated Circuit System
Logo Integrated Circuit System
Description 1-to-2 Differential-to-2.5V/3.3V CML Fanout Buffer
Datasheet ICS855011 DatasheetICS855011 Datasheet (PDF)

PRELIMINARY Integrated Circuit Systems, Inc. ICS855011 www.DataSheet4U.com LOW SKEW , 1-TO-2 DIFFERENTIAL-TO-2.5V/3.3V CML FANOUT BUFFER GENERAL DESCRIPTION The ICS855011 is a low skew, high performance 1-to-2 Differential-to-2.5V/3.3V CML HiPerClockS™ Fa n o u t B u f fe r a n d a m e m b e r o f t h e HiPerClockS ™ family of High Perfor mance Clock Solutions from ICS. The ICS855011 is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and par t-to-par t sk.

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PRELIMINARY Integrated Circuit Systems, Inc. ICS855011 www.DataSheet4U.com LOW SKEW , 1-TO-2 DIFFERENTIAL-TO-2.5V/3.3V CML FANOUT BUFFER GENERAL DESCRIPTION The ICS855011 is a low skew, high performance 1-to-2 Differential-to-2.5V/3.3V CML HiPerClockS™ Fa n o u t B u f fe r a n d a m e m b e r o f t h e HiPerClockS ™ family of High Perfor mance Clock Solutions from ICS. The ICS855011 is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and par t-to-par t skew characteristics make the ICS855011 ideal for those clock distribution applications demanding well defined perfor mance and repeatability. FEATURES • 2 differential 2.5V/3.3V CML outputs • 1 differential PCLK, nPCLK input pair • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Output frequency: >3GHz • Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on nPCLK input • Output skew: 5ps (typical) • Part-to-part skew: TBD • Propagation delay: 242ps (typical) • Operating voltage supply range: VCC = 2.375V to 3.8V, VEE = 0V • -40°C to 85°C ambient operating temperature ICS BLOCK DIAGRAM PCLK nPCLK Q0 nQ0 Q1 nQ1 PIN ASSIGNMENT Q0 nQ0 Q1 nQ1 1 2 3 4 8 7 6 5 Vcc PCLK nPCLK VEE ICS855011 8-Lead SOIC 3.90mm x 4.90mm x 1.37mm package body M Package Top View The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 855011AM www.icst.com/products/hiperclocks.html REV. A AUGUST 18, 2004 1 PRELIMINARY Integrated Circuit Systems, Inc. ICS855011 www.DataSheet4U.com LOW SKEW , 1-TO-2 DIFFERENTIAL-TO-2.5V/3.3V CML FANOUT BUFFER TABLE 1. PIN DESCRIPTIONS Number 1, 2 3, 4 5 6 7 8 Name Q0, nQ0 Q1, nQ1 VEE nPCLK PCLK VCC Output Output Power Input Input Power Pullup Type Description Differential output pair. CML interface levels. Differential output pair. CML interface levels. Negative supply pin. Inver ting differential LVPECL clock input. Positive supply pin. Pulldown Non-inver ting LVPECL differential clock input. NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol RPULLDOWN RPULLUP Parameter Input Pulldown Resistor Input Pullup Resistor Test Conditions Minimum Typical 75 75 Maximum Units KΩ KΩ 855011AM www.icst.com/products/hiperclocks.html 2 REV. A AUGUST 18, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS855011 www.DataSheet4U.com LOW SKEW , 1-TO-2 DIFFERENTIAL-TO-2.5V/3.3V CML FANOUT BUFFER ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC Inputs, VI Outputs, IO Continuous Current Surge Current Storage Temperature, TSTG Package Thermal Impedance, θJA (Junction-to-Ambient) 4.6V (CML mode, VEE = 0) -0.5V to VCC + 0.5 V 20mA 40mA -65°C to 150°C 112.7°C/W (0 lfpm) Operating Temperature Range, TA -40°C to +85°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = 2.375V TO 3.8V; VEE = 0V Symbol VCC IEE Parameter Positive Supply Voltage Power Supply Current Test Conditions Minimum 2.375 Typical 3.3 50 Maximum 3.8 Units V mA TABLE 3B. LVPECL DC CHARACTERISTICS, VCC = 2.375V TO 3.8V; VEE = 0V Symbol IIH IIL VPP Parameter Input High Current Input Low Current PCLK nPCLK PCLK nPCLK Test Conditions VCC = VIN = 3.8V VCC = VIN = 3.8V VCC = 3.8V, VIN = 0V VCC = 3.8V, VIN = 0V -5 -150 1 VCC Minimum Typical Maximum 150 5 Units µA µA µA µA V V Peak-to-Peak Input Voltage 0.3 Common Mode Input Voltage; VCMR VEE + 1.5 NOTE 1, 2 NOTE 1: Common mode voltage is defined as VIH. NOTE 2: For single ended applications, the maximum input voltage for PCLK and nPCLK is VCC + 0.3V. TABLE 3C. CML DC CHARACTERISTICS, VCC = 2.375V TO 3.8V; VEE = 0V Symbol VOH VOUT VDIFF_OUT ROUT Parameter Output High Voltage; NOTE 1 Output Voltage Swing Differential Output Voltage Swing Output Source Impedance Conditions Minimum VCC - 0.020 325 650 40 Typical VCC - 0.010 400 800 50 60 Maximum VCC Units V mV mV Ω NOTE 1: Outputs terminated with 100Ω across differential output pair. 855011AM www.icst.com/products/hiperclocks.html 3 REV. A AUGUST 18, 2004 PRELIMINARY Integrated Circuit Systems, Inc. ICS855011 www.DataSheet4U.com LOW SKEW , 1-TO-2 DIFFERENTIAL-TO-2.5V/3.3V CML FANOUT BUFFER TABLE 4. AC CHARACTERISTICS, VCC = 0V; VEE = -3.8V TO -2.375V OR VCC = 2.375 TO 3.8V; VEE = 0V Symbol Parameter fMAX Output Frequency Propagation Delay; (Differ.


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