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BUK9MHH-65PNN

NXP

Dual TrenchPLUS FET Logic Level FET

www.DataSheet4U.com BUK9MHH-65PNN Dual TrenchPLUS FET Logic Level FET Rev. 02 — 19 May 2010 Objective data sheet 1. Pr...


NXP

BUK9MHH-65PNN

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www.DataSheet4U.com BUK9MHH-65PNN Dual TrenchPLUS FET Logic Level FET Rev. 02 — 19 May 2010 Objective data sheet 1. Product profile 1.1 General description Dual N-channel enhancement mode field-effect power transistor in SO20. Device is manufactured using NXP High-Performance Architecture (HPA) TrenchPLUS technology, featuring very low on-state resistance, integrated current sensing transistors and over temperature protection diodes. 1.2 Features and benefits „ Integrated current sensors „ Integrated temperature sensors 1.3 Applications „ Lamp switching „ Motor drive systems „ Power distribution „ Solenoid drivers 1.4 Quick reference data Table 1. Symbol RDSon Quick reference data Parameter drain-source on-state resistance ratio of drain current to sense current drain-source breakdown voltage Conditions VGS = 5 V; ID = 10 A; Tj = 25 °C; see Figure 15; see Figure 16 Tj = 25 °C; VGS = 5 V; see Figure 17 ID = 250 µA; VGS = 0 V; Tj = 25 °C Min Typ 9.8 Max Unit 11.5 mΩ FET1 and FET2 static characteristics ID/Isense 6193 6881 7569 A/A V(BR)DSS 65 - - V www.DataSheet4U.com NXP Semiconductors BUK9MHH-65PNN Dual TrenchPLUS FET Logic Level FET 2. Pinning information Table 2. Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pinning information Symbol Description G1 IS1 D1 A1 C1 G2 IS2 D2 A2 C2 D2 KS2 S2 S2 D2 D1 KS1 S1 S1 D1 gate 1 current sense 1 drain anode 1 cathode 1 gate 2 current sense 2 drain 2 anode 2 cathode 2 drain 2 Kelvin source 2 source 2 source 2 dra...




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