Document
Freescale Semiconductor Data Sheet: Technical Data
Document Number: IMX51AEC Rev. 6, 10/2012
IMX51A
i.MX51A Automotive and Infotainment Applications Processors
Package Information Plastic Package
Case 2017 19 x 19 mm, 0.8 mm pitch
Ordering Information See Table 1 on page 2 for ordering information.
1 Introduction
The MCIMX51A (i.MX51A) Automotive Infotainment Processor represents Freescale Semiconductor’s latest addition to a growing family of multimedia focused products offering high performance processing with a high degree of functional integration, aimed at the growing automotive infotainment market. This device includes two graphics processors, 720p video processing, dual display, and many I/Os.
The i.MX51A processor features Freescale’s advanced implementation of the ARM Cortex A8™ core, targeting speeds up to 600 MHz with 200 MHz I/O bus clock DDR2 and mobile DDR. This device is well-suited for graphics rendering for HMI and navigation, high performance speech processing with large databases, video processing and display, audio playback and ripping, and many other applications.
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 2 1.2. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1. Special Signal Considerations . . . . . . . . . . . . . . . 11
3. IOMUX Configuration for Boot Media . . . . . . . . . . . . . . . 13 3.1. NAND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.2. SD/MMC IOMUX Pin Configuration . . . . . . . . . . . 14 3.3. I2C IOMUX Pin Configuration . . . . . . . . . . . . . . . . 14 3.4. eCSPI/CSPI IOMUX Pin Configuration . . . . . . . . 15 3.5. Wireless External Interface Module (WEIM) . . . . 15 3.6. UART IOMUX Pin Configuration . . . . . . . . . . . . . 15 3.7. USB-OTG IOMUX Pin Configuration . . . . . . . . . . 15
4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1. Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . 16 4.2. Supply Power-Up/Power-Down Requirements and Restrictions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.3. I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 22 4.4. Output Buffer Impedance Characteristics . . . . . . 29 4.5. I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 33 4.6. Module Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 4.7. External Peripheral Interfaces . . . . . . . . . . . . . . . 72
5. Package Information and Contact Assignments . . . . . 151 5.1. 19 x 19 mm Package Information . . . . . . . . . . . . 151 5.2. 19 x 19 mm, 0.8 Pitch Ball Map . . . . . . . . . . . . . 169
6. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
© 2012 Freescale Semiconductor, Inc. All rights reserved.
Introduction
Features of the i.MX51A processor include the following:
• Smart Speed Technology—The i.MX51A device has power management throughout the IC that enables the rich suite of multimedia feature and peripherals to achieve minimum power consumption in both active and various low power modes. Smart Speed Technology enables the designer to deliver a feature-rich product that requires levels of power that are far less than industry expectations.
• Multimedia—The multimedia performance of the ARM Cortex A8 is enhanced with a multi-level cache system, a Multi-standard Hardware Video CODECs, autonomous image processing unit, multi-standard audio CODECs, Neon (an advanced SIMD, 32 bit single-precision floating point support and vector floating point co-processor), and a programmable smart DMA controller.
• Powerful Graphics Acceleration—The i.MX51A processor has an integrated Graphics Processing Unit which includes an OpenGl 2.0 GPU that provides 27Mtri/sec, 166Mpix/s, and 664Mpix/s z-plane performance. Silicon version 2.0 of the i.MX51A device includes an independent OpenVG GPU operating at166Mpix/s.
• Interface Flexibility—The i.MX51A processor supports connections to all popular types of external memories: mobile DDR, DDR2, PSRAM, NOR Flash, NAND Flash (MLC and SLC), and OneNAND (managed NAND). The i.MX51A processor also includes a rich multimedia suite of interfaces: LCD controller for two displays, CMOS sensor interface, High-Speed USB On-The-Go plus three High-Speed USB hosts, high-speed MMC/SDIO, Fast Ethernet controller, UART, I2C, I2S (SSI), and others.
1.1 Ordering Information
Table 1 provides the ordering information.
Table 1. Ordering Information
Part Number
Mask Set
Features
MCIMX514AJM6C
M77X No hardware video codecs
MCIMX516AJM6C
M77X Full specification
1 Case 2017 and Case 2058 are RoHS compliant, lead-free, MSL = 3.
Junction Temperature
Range (°C)
Package1
–40 to 125 –40 to 125
19 x 19 mm, 0.8 mm pitch BGA Case 2017
19 x 19 mm, 0.8 mm pitch BGA Ca.