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PSMN3R8-30LL
N-channel QFN3333 30 V 3.8 mΩ logic level MOSFET
Rev. 02 — 22 June 2010 Objective data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in QFN3333 package qualified to 150 °C. This product is designed and qualified for use in a wide range of industrial, communications and power supply equipment.
1.2 Features and benefits
High efficiency due to low switching and conduction losses Small footprint for compact designs Suitable for logic level gate drive sources
1.3 Applications
Battery protection DC-to-DC converters Load switching Power ORing
1.4 Quick reference data
Table 1. Symbol VDS ID Ptot Tj RDSon Quick reference data Parameter drain-source voltage drain current total power dissipation junction temperature drain-source on-state resistance VGS = 4.5 V; ID = 10 A; Tj = 25 °C VGS = 10 V; ID = 10 A; Tj = 100 °C; see Figure 12 VGS = 10 V; ID = 10 A; Tj = 25 °C; see Figure 13 Conditions Tj ≥ 25 °C; Tj ≤ 150 °C Tmb = 25 °C; VGS = 10 V; see Figure 2 Tmb = 25 °C; see Figure 1 Min -55 Typ 4.5 3 Max Unit 30 40 69 150 5.8 5.1 3.8 V A W °C mΩ mΩ mΩ
Static characteristics
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NXP Semiconductors
PSMN3R8-30LL
N-channel QFN3333 30 V 3.8 mΩ logic level MOSFET
Quick reference data …continued Parameter gate-drain charge total gate charge Conditions VGS = 10 V; ID = 15 A; VDS = 15 V; see Figure 14; see Figure 15 VGS = 4.5 V; ID = 15 A; VDS = 15 V; see Figure 14; see Figure 15 Min Typ 5.3 38 18 Max Unit nC nC nC
Table 1. Symbol QGD QG(tot)
Dynamic characteristics
Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy VGS = 10 V; Tj(init) = 25 °C; ID = 40 A; Vsup ≤ 30 V; unclamped; RGS = 50 Ω 109 mJ
2. Pinning information
Table 2. Pin 1 2 3 4 5,6,7,8 Pinning information Symbol Description S S S G D source source source gate mounting base; connected to drain
mbb076
Simplified outline
8 7 6 5
Graphic symbol
D
G S
1 2 3 4 Transparent top view
SOT873-1 (QFN3333)
3. Ordering information
Table 3. Ordering information Package Name PSMN3R8-30LL QFN3333 Description plastic thermal enhanced very thin small outline package; no leads; 8 terminals Version SOT873-1 Type number
PSMN3R8-30LL
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 02 — 22 June 2010
2 of 15
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NXP Semiconductors
PSMN3R8-30LL
N-channel QFN3333 30 V 3.8 mΩ logic level MOSFET
4. Limiting values
Table 4. Symbol VDS VDGR VGS ID IDM Ptot Tstg Tj Tsld(M) Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature peak soldering temperature source current peak source current non-repetitive drain-source avalanche energy Tmb = 25 °C pulsed; tp ≤ 10 µs; Tmb = 25 °C VGS = 10 V; Tj(init) = 25 °C; ID = 40 A; Vsup ≤ 30 V; unclamped; RGS = 50 Ω VGS = 10 V; Tmb = 100 °C; see Figure 2 VGS = 10 V; Tmb = 25 °C; see Figure 2 pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 3 Tmb = 25 °C; see Figure 1 Conditions Tj ≥ 25 °C; Tj ≤ 150 °C Tj ≤ 150 °C; Tj ≥ 25 °C; RGS = 20 kΩ Min -20 -55 -55 Typ Max 30 30 20 40 40 413 69 150 150 260 Unit V V V A A A W °C °C °C
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode IS ISM EDS(AL)S 40 413 109 A A mJ
Avalanche ruggedness
120 Pder (%) 80
003aab937
40
0 0 50 100 150 Tmb (°C) 200
Fig 1.
Normalized total power dissipation as a function of solder point temperature
PSMN3R8-30LL
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 02 — 22 June 2010
3 of 15
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NXP Semiconductors
PSMN3R8-30LL
N-channel QFN3333 30 V 3.8 mΩ logic level MOSFET
120 ID (A) 100
003aae270
80
60
40
(1)
20
0 0 50 100 150 200 Tmb (°C)
Fig 2.
103 ID (A) 102
Continuous drain current as a function of mounting base temperature
003a a e 271
Limit RDSon = VDS / ID
tp = 10 μs 100 μs
10 DC 1 1 ms 10 ms 100 ms 10−1
10−2 10−1
1
10
VDS (V)
102
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN3R8-30LL
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Objective data sheet
Rev. 02 — 22 June 2010
4 of 15
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NXP Semiconductors
PSMN3R8-30LL
N-channel QFN3333 30 V 3.8 mΩ logic level MOSFET
5. Thermal characteristics
Table 5. Symbol Rth(j-mb) Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to mounting base thermal resistance from junction to ambient Conditions see Figure 4
[1]
Min -
Typ 1 53
Max 1.3 60
Unit K/W K/W
[1]
Rth(j-a) is guaranteed by design and assumes that the device is mounted on a 40mm x 40mm x 70µm copper pad at 20°C ambient temperature. In practice Rth(j-a) will be determined by t.