Document
BUK9609-75A
N-channel TrenchMOS logic level FET
Rev. 03 — 22 September 2008
www.DataSheet4U.com
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
Low conduction losses due to low on-state resistance Q101 compliant Suitable for logic level gate drive sources Suitable for thermally demanding environments due to 175 °C rating
1.3 Applications
12 V, 24 V and 42 V loads Automotive and general purpose power switching Motors, lamps and solenoids
1.4 Quick reference data
Table 1. VDS ID Ptot Quick reference Conditions VGS = 5 V; Tj = 25 °C; see Figure 3; see Figure 1 Tmb = 25 °C; see Figure 2 Min Typ Max 75 75 230 Unit V A W drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C drain current total power dissipation Symbol Parameter
Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Static characteristics RDSon drain-source on-state resistance VGS = 4.5 V; ID = 25 A; Tj = 25 °C VGS = 5 V; ID = 25 A; Tj = 25 °C; see Figure 12; see Figure 15 7.6 9.95 9 mΩ mΩ ID = 75 A; Vsup ≤ 75 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped 562 mJ
NXP Semiconductors
BUK9609-75A
w w w . D a t a S h e e t 4 U . c o
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2. Pin 1 2 3 mb Pinning information Symbol G D S D Description gate drain source mounting base; connected to drain
2 1 3 mb
D
Simplified outline
Graphic symbol
G
mbb076
S
SOT404 (D2PAK)
3. Ordering information
Table 3. Ordering information Type number Package Name Description BUK9609-75A D2PAK Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
Version SOT404
4. Limiting values
Table 4. Symbol VDS VDGR VGS ID IDM Ptot Tstg Tj VGSM Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature peak gate-source voltage source current peak source current pulsed; tp ≤ 50 µs VGS = 5 V; Tj = 100 °C; see Figure 1 VGS = 5 V; Tj = 25 °C; see Figure 3; see Figure 1 Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3 Tmb = 25 °C; see Figure 2 Conditions Tj ≥ 25 °C; Tj ≤ 175 °C RGS = 20 kΩ Min -10 -55 -55 -15 Max 75 75 10 65 75 440 230 175 175 15 Unit V V V A A A W °C °C V
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode IS ISM EDS(AL)S Tmb = 25 °C tp ≤ 10 µs; pulsed; Tmb = 25 °C 75 440 562 A A mJ
Avalanche ruggedness non-repetitive ID = 75 A; Vsup ≤ 75 V; RGS = 50 Ω; VGS = 5 V; drain-source avalanche Tj(init) = 25 °C; unclamped energy
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
2 of 12
NXP Semiconductors
BUK9609-75A
www.DataSheet4U.com
N-channel TrenchMOS logic level FET
120 Ider (%) 80
03aa24
120 Pder (%) 80
03na19
40
40
0 0 50 100 150 Tmb (°C) 200
0 0 50 100 150 Tmb (°C) 200
Fig 1. Normalized continuous drain current as a function of mounting base temperature
1000 ID (A) RDSon = VDS/ ID
Fig 2. Normalized total power dissipation as a function of mounting base temperature
03nb44
tp = 10 us 100 100 us
1 ms 10
P
δ=
tp T
D.C. 10 ms 100 ms
tp T
t
1 1 10 VDS (V) 100
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
3 of 12
NXP Semiconductors
BUK9609-75A
www.DataSheet4U.com
N-channel TrenchMOS logic level FET
5. Thermal characteristics
Table 5. Symbol Rth(j-mb) Thermal characteristics Parameter Conditions Min Typ Max 0.65 Unit K/W thermal resistance from see Figure 4 junction to mounting base thermal resistance from minimum footprint; mounted on a junction to ambient printed-circuit board
Rth(j-a)
-
50
-
K/W
1 Zth(j-mb) (K/W)
03nb45
δ = 0.05
0.2
0.1
0.1 0.05 0.02
0.01
P
δ=
tp T
Single Shot
tp T
t
0.001
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9609-75A_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 22 September 2008
4 of 12
NXP Semiconductors
BUK9609-75A
www.DataSheet4U.com
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6. Symbol V(BR)DSS VGS(th) Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage Conditions ID = 0.25 mA; VGS = 0 V; Tj = 25 °C ID = 0.25 mA; VGS = 0 V; Tj = -55 °C ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 6 ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 6 ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 6 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance VDS = 75 V; VGS = 0 V; .