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MCP1825/MCP1825S
500 mA, Low Voltage, Low Quiescent Current LDO Regulator
Features
• 500 mA Output Current Capability • Input Operating Voltage Range: 2.1V to 6.0V • Adjustable Output Voltage Range: 0.8V to 5.0V (MCP1825 only) • Standard Fixed Output Voltages: - 0.8V, 1.2V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V • Other Fixed Output Voltage Options Available Upon Request • Low Dropout Voltage: 210 mV Typical at 500 mA • Typical Output Voltage Tolerance: 0.5% • Stable with 1.0 µF Ceramic Output Capacitor • Fast response to Load Transients • Low Supply Current: 120 µA (typical) • Low Shutdown Supply Current: 0.1 µA (typical) (MCP1825 only) • Fixed Delay on Power Good Output (MCP1825 only) • Short Circuit Current Limiting and Overtemperature Protection • TO-263-5 (DDPAK-5), TO-220-5, SOT-223-5 Package Options (MCP1825). • TO-263-3 (DDPAK-3), TO-220-3, SOT-223-3 Package Options (MCP1825S).
Description
The MCP1825/MCP1825S is a 500 mA Low Dropout (LDO) linear regulator that provides high current and low output voltages. The MCP1825 comes in a fixed or adjustable output voltage version, with an output voltage range of 0.8V to 5.0V. The 500 mA output current capability, combined with the low output voltage capability, make the MCP1825 a good choice for new sub-1.8V output voltage LDO applications that have high current demands. The MCP1825S is a 3-pin fixed voltage version. The MCP1825/MCP1825S is stable using ceramic output capacitors that inherently provide lower output noise and reduce the size and cost of the entire regulator solution. Only 1 µF of output capacitance is needed to stabilize the LDO. Using CMOS construction, the quiescent current consumed by the MCP1825/MCP1825S is typically less than 120 µA over the entire input voltage range, making it attractive for portable computing applications that demand high output current. The MCP1825 versions have a Shutdown (SHDN) pin. When shut down, the quiescent current is reduced to less than 0.1 µA. On the MCP1825 fixed output versions, the scaleddown output voltage is internally monitored and a power good (PWRGD) output is provided when the output is within 92% of regulation (typical). The PWRGD delay is internally fixed at 110 µs (typical). The overtemperature and short circuit current-limiting provide additional protection for the LDO during system fault conditions.
Applications
• • • • • • High-Speed Driver Chipset Power Networking Backplane Cards Notebook Computers Network Interface Cards Palmtop Computers 2.5V to 1.XV Regulators
© 2008 Microchip Technology Inc.
DS22056B-page 1
MCP1825/MCP1825S
Package Types
MCP1825 DDPAK-5 TO-220-5 Fixed/Adjustable DDPAK-3 MCP1825S
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TO-220-3
1 1 2 3 4 5 1 2 3 4 5
2
3 1 2 3
SOT-223-5
6
SOT-223-3
4
1
2
3
4
5
1
2
3
Pin 1 2 3 4 5 6
Fixed SHDN VIN GND (TAB) VOUT PWRGD GND (TAB)
Adjustable SHDN VIN GND (TAB) VOUT ADJ GND (TAB)
Pin 1 2 3 4 VIN GND (TAB) VOUT GND (TAB)
DS22056B-page 2
© 2008 Microchip Technology Inc.
MCP1825/MCP1825S
Typical Applications
MCP1825 Fixed Output Voltage
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PWRGD
On Off VIN = 2.3V to 2.8V C1 4.7 µF SHDN VIN 1 GND VOUT
R1 100 kΩ VOUT = 1.8V @ 500 mA
C2 1 µF
MCP1825 Adjustable Output Voltage
VADJ R2 20 kΩ
On Off VIN = 2.1V to 2.8V C1 4.7 µF GND SHDN VIN 1 VOUT
R1 40 kΩ
VOUT = 1.2V @ 500 mA
C2 1 µF
© 2008 Microchip Technology Inc.
DS22056B-page 3
MCP1825/MCP1825S
Functional Block Diagram - Adjustable Output
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PMOS VIN VOUT
Undervoltage Lock Out (UVLO)
ISNS
Cf
Rf ADJ/SENSE
SHDN Driver w/limit and SHDN SHDN VREF V IN SHDN Soft-Start Comp GND 92% of VREF TDELAY Reference + EA –
Overtemperature Sensing
DS22056B-page 4
© 2008 Microchip Technology Inc.
MCP1825/MCP1825S
Functional Block Diagram - Fixed Output (3-Pin)
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PMOS VIN VOUT
Undervoltage Lock Out (UVLO)
Sense ISNS Cf
Rf
SHDN Driver w/limit and SHDN SHDN VREF V IN SHDN Soft-Start Comp GND 92% of VREF TDELAY Reference + EA –
Overtemperature Sensing
© 2008 Microchip Technology Inc.
DS22056B-page 5
MCP1825/MCP1825S
Functional Block Diagram - Fixed Output (5-Pin)
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PMOS VIN VOUT
Undervoltage Lock Out (UVLO)
Sense ISNS Cf
Rf
SHDN Driver w/limit and SHDN SHDN VREF V IN SHDN Soft-Start Comp GND 92% of VREF TDELAY Reference PWRGD + EA –
Overtemperature Sensing
DS22056B-page 6
© 2008 Microchip Technology Inc.
MCP1825/MCP1825S
1.0 ELECTRICAL CHARACTERISTICS
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Absolute Maximum Ratings †
VIN ....................................................................................6.5V Maximum Voltage on Any Pin .. (GND – 0.3V) to (VDD + 0.3)V Maximum Power Dissipation......... Internally-Limited (Note 6) Output Short Circuit Duration ................................ Continuous Storage temperature .....................................-65°C to +150°C Maximum Junction Temperature, TJ ........................... +150°C ESD protection on all pins (HBM/MM) ........... ≥ 4 kV; ≥ 300V
† Not.