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AK4125 Dataheets PDF



Part Number AK4125
Manufacturers Asahi Kasei Microsystems
Logo Asahi Kasei Microsystems
Description 192kHz / 24Bit High Performance Asynchronous SRC
Datasheet AK4125 DatasheetAK4125 Datasheet (PDF)

[AK4125] www.DataSheet4U.com AK4125 192kHz / 24Bit High Performance Asynchronous SRC GENERAL DESCRIPTION The AK4125 is a stereo digital sample rate converter (SRC). The input sample rate ranges from 8kHz to 216kHz. The output sample rate is from 8kHz to 216kHz. The system can take very simple configuration because the AK4125 has an internal PLL and does not need any master clock at slave mode. The AK4125 is suitable for the application interfacing to different sample rates such as high-end Car .

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[AK4125] www.DataSheet4U.com AK4125 192kHz / 24Bit High Performance Asynchronous SRC GENERAL DESCRIPTION The AK4125 is a stereo digital sample rate converter (SRC). The input sample rate ranges from 8kHz to 216kHz. The output sample rate is from 8kHz to 216kHz. The system can take very simple configuration because the AK4125 has an internal PLL and does not need any master clock at slave mode. The AK4125 is suitable for the application interfacing to different sample rates such as high-end Car Audio and DVD recorder. FEATURES 1. SRC • Asynchronous Sample Rate Converter • Input Sample Rate Range (fsi): 8kHz ∼ 216kHz • Output Sample Rate Range (fso): 8kHz ∼ 216kHz • Input to Output Sample Rate Ratio: 1/6 to 6 • THD+N: −130dB • Dynamic Range: 140dB (A-weighted) • I/F format: MSB justified, LSB justified and I2S compatible • PLL for Internal Operation Clock • Clock for Master mode: 128/192/256/384/512/768fsi, 128/192/256/384/512/768fso • SRC Bypass mode • Soft Mute Function Power Supply • AVDD, DVDD: 3.0 ∼ 3.6V (typ. 3.3V) Ta = −40 ∼ 85°C Package: 30pin VSOP AK4124 Pin-compatible IDIF2 IDIF1 IDIF0 AVDD AVSS DVDD DVSS ODIF1 ODIF0 OBIT1 OBIT0 IBICK ILRCK SDTI Serial Audio I/F Serial Audio I/F OLRCK OBICK SDTO OMCLK PDN PLL2 PLL1 PLL0 SMUTE PLL DITHER 2. 3. 4. 5. SRC UNLOCK IMCLK CMODE2 CMODE1 CMODE0 MS0379-E-04 -1- 2007/07 [AK4125] www.DataSheet4U.com ■ Ordering Guide AK4125VF AKD4125 −40 ∼ +85°C 30pin VSOP (0.65mm pitch) Evaluation Board for AK4125 ■ Pin Layout FILT AVSS PDN SMUTE DITHER PLL2 ILRCK IBICK SDTI IDIF0 IDIF1 IDIF2 PLL0 PLL1 UNLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Top View 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 AVDD DVSS DVDD OMCLK OLRCK OBICK SDTO ODIF1 ODIF0 CMODE2 CMODE1 CMODE0 IMCLK OBIT1 OBIT0 MS0379-E-04 -2- 2007/07 [AK4125] www.DataSheet4U.com ■ Compatibility with AK4124 Digital Filter Passband 0.985 ≤ FSO/FSI ≤ 6.000 0.905 ≤ FSO/FSI < 0.985 0.714 ≤ FSO/FSI < 0.905 0.656 ≤ FSO/FSI < 0.714 0.536 ≤ FSO/FSI < 0.656 0.492 ≤ FSO/FSI < 0.536 0.452 ≤ FSO/FSI < 0.492 0.357 ≤ FSO/FSI < 0.452 0.324 ≤ FSO/FSI < 0.357 0.246 ≤ FSO/FSI < 0.324 0.226 ≤ FSO/FSI < 0.246 0.1667 ≤ FSO/FSI < 0.226 AK4124 0.4583FSI 0.4167FSI 0.3195FSI 0.2852FSI 0.2182FSI 0.1982FSI 0.1740FSI 0.1212FSI 0.1072FSI 0.0595FSI 0.0484FSI 0.0182FSI AK4125 ← ← ← ← ← 0.2177FSI 0.1948FSI 0.1458FSI 0.1302FSI 0.0917FSI 0.0826FSI 0.0583FSI Refer to Table 8 for the detail of filter response. MS0379-E-04 -3- 2007/07 [AK4125] www.DataSheet4U.com PIN/FUNCTION No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Pin Name FILT AVSS PDN SMUTE DITHER PLL2 ILRCK IBICK SDTI IDIF0 IDIF1 IDIF2 PLL0 PLL1 UNLOCK OBIT0 OBIT1 IMCLK CMODE0 CMODE1 CMODE2 ODIF0 ODIF1 SDTO OBICK OLRCK OMCLK DVDD DVSS AVDD I/O O I I I I I/O I/O I I I I I I O I I I I I I I I O I/O I/O I Function PLL Loop Filter Pin Analog Ground Pin Power-Down Mode Pin “H”: Power up, “L”: Power down reset and initializes the control register. Soft Mute Pin “H” : Soft Mute, “L” : Normal Operation Dither Enable Pin “H” : Dither ON, “L” : Dither OFF PLL Mode Select 2 Pin Input Channel Clock Pin Audio Serial Data Clock Pin Audio Serial Data Input Pin Audio Interface Format 0 Pin for Input PORT Audio Interface Format 1 Pin for Input PORT Audio Interface Format 2 Pin for Input PORT PLL Mode Select 0 Pin PLL Mode Select 1 Pin Unlock Status Pin Bit Length Select 0 Pin for Output Data Bit Length Select 1 Pin for Output Data Master Clock Input Pin for Input PORT Clock Mode Select 0 Pin Clock Mode Select 1 Pin Clock Mode Select 2 Pin Audio Interface Format 0 Pin for Output PORT Audio Interface Format 1 Pin for Output PORT Audio Serial Data Output Pin for Output PORT Audio Serial Data Clock Pin for Output PORT Output Channel Clock Pin for Output PORT Master Clock Input Pin for Output PORT Digital Power Supply Pin, 3.0 ∼ 3.6V Digital Ground Pin Analog Power Supply Pin, 3.0 ∼ 3.6V Note: All input pins must not be left floating. MS0379-E-04 -4- 2007/07 [AK4125] www.DataSheet4U.com ■ Handling of Unused pins The unused digital I/O pins should be processed appropriately as below. Classification Analog Digital Pin Name FILT SMUTE, DITHER IMCLK, OMCLK UNLOCK Setting This pin should be open. These pins should be connected to DVSS. These pins should be connected to DVSS in slave mode. This pin should be open. ABSOLUTE MAXIMUM RATINGS (AVSS, DVSS=0V; Note 1) Parameter Power Supplies: Analog Digital |AVSS − DVSS| (Note 2) Input Current, Any Pin Except Supplies Digital Input Voltage Ambient Temperature (Power applied) Storage Temperature Symbol AVDD DVDD ΔGND IIN VIND Ta Tstg min −0.3 −0.3 −0.3 −40 −65 max 4.6 4.6 0.3 ±10 DVDD+0.3 85 150 Units V V V mA V °C °C Note 1. All voltages with respect to ground. Note 2. AVSS and DVSS must be connected to the same ground. WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. RECOMMENDED OPERATING CONDITIONS (AVSS, DVSS=0V;.


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