Document
Analog Multiplexers / Demultiplexers with LSTTL Compatible Inputs
High−Performance Silicon−Gate CMOS
MC74HCT4051A, MC74HCT4052A, MC74HCT4053A
The MC74HCT4051A, MC74HCT4052A and MC74HCT4053A utilize silicon−gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. These analog multiplexers/demultiplexers control analog voltages that may vary across the complete power supply range (from VCC to VEE).
The HCT4051A, HCT4052A and HCT4053A are identical in pinout to the metal−gate MC14051AB, MC14052AB and MC14053AB. The Channel−Select inputs determine which one of the Analog Inputs/Outputs is to be connected, by means of an analog switch, to the Common Output/Input. When the Enable pin is HIGH, all analog switches are turned off.
The Channel−Select and Enable inputs are compatible with standard CMOS and LSTTL outputs.
These devices have been designed so that the ON resistance (Ron) is more linear over input voltage than Ron of metal−gate CMOS analog switches.
For a multiplexer/demultiplexer with injection current protection, see HC4851A and HCT4851A.
Features
• Fast Switching and Propagation Speeds • Low Crosstalk Between Switches • Diode Protection on All Inputs/Outputs • Analog Power Supply Range (VCC − VEE) = 2.0 to 12.0 V • Digital (Control) Power Supply Range (VCC − GND) = 2.0 to 6.0 V • Improved Linearity and Lower ON Resistance Than Metal−Gate
Counterparts
• Low Noise • In Compliance with the Requirements of JEDEC Standard No. 7 A • Chip Complexity: HCT4051A − 184 FETs or 46 Equivalent Gates
HCT4052A − 168 FETs or 42 Equivalent Gates HCT4053A − 156 FETs or 39 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
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16 1
MARKING DIAGRAMS
16
SOIC−16 D SUFFIX CASE 751B
HCT405xAG AWLYWW
1
16 1
TSSOP−16 DT SUFFIX CASE 948F
16
HCT40 5xA
ALYWG G
1
x
= 1, 2, 3
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
August, 2020 − Rev. 3
Publication Order Number: MC74HCT4051A/D
MC74HCT4051A, MC74HCT4052A, MC74HCT4053A
X0 13
X1 14
ANALOG INPUTS/ OUTPUTS
X2 15 X3 12 X4 1
MULTIPLEXER/ DEMULTIPLEXER
X5 5
X6 2
X7 4
A 11
CHANNEL SELECT
B 10
INPUTS C 9
ENABLE 6
PIN 16 = VCC
PIN 7 = VEE
PIN 8 = GND
3
X
COMMON OUTPUT/
INPUT
Figure 1. Logic Diagram − MC74HCT4051A Single−Pole, 8−Position Plus Common Off
FUNCTION TABLE − MC74HCT4051A
Control Inputs
Enable
Select CBA
L
LLL
L
L LH
L
LHL
L
L HH
L
HL L
L
HLH
L
HH L
L
HHH
H
XXX
ON Channels
X0 X1 X2 X3 X4 X5 X6 X7 NONE
X = Don’t Care
VCC X2 X1 X0 X3 A B C 16 15 14 13 12 11 10 9
12345678 X4 X6 X X7 X5 Enable VEE GND
Figure 2. Pinout: MC74HCT4051A (Top View)
ANALOG INPUTS/OUTPUTS
CHANNEL‐SELECT INPUTS
X0 12 X1 14 X2 15 X3 11
Y0 1 Y1 5 Y2 2 Y3 4 A 10 B9
ENABLE 6
X SWITCH Y SWITCH
13 X
COMMON OUTPUTS/INPUTS 3Y
PIN 16 = VCC PIN 7 = VEE PIN 8 = GND
Figure 3. Logic Diagram − MC74HCT4052A Double−Pole, 4−Position Plus Common Off
FUNCTION TABLE − MC74HCT4052A
Control Inputs
Enable
Select
B
A
ON Channels
L
L
L
L
L
H
L
H
L
L
H
H
H
X
X
X = Don’t Care
Y0
X0
Y1
X1
Y2
X2
Y3
X3
NONE
VCC X2 X1 X X0 X3 A B 16 15 14 13 12 11 10 9
12345678 Y0 Y2 Y Y3 Y1 Enable VEE GND
Figure 4. Pinout: MC74HCT4052A (Top View)
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MC74HCT4051A, MC74HCT4052A, MC74HCT4053A
X0 12 X1 13
Y0 2
ANALOG INPUTS/OUTPUTS
Y1 1
Z0 5 Z1 3
A 11
CHANNEL‐SELECT INPUTS
B 10 C9
ENABLE 6
X SWITCH Y SWITCH Z SWITCH
14 X
15 Y
COMMON OUTPUTS/INPUTS
4Z
FUNCTION TABLE − MC74HCT4053A
Control Inputs
Enable
Select CBA
ON Channels
L
L L L Z0 Y0 X0
L
L L H Z0 Y0 X1
L
L H L Z0 Y1 X0
L
L H H Z0 Y1 X1
L
H L L Z1 Y0 X0
L
H L H Z1 Y0 X1
L
H H L Z1 Y1 X0
L
H H H Z1 Y1 X1
H
XXX
NONE
X = Don’t Care
PIN 16 = VCC PIN 7 = VEE PIN 8 = GND
VCC Y X X1 X0 A B C 16 15 14 13 12 11 10 9
NOTE: This device allows independent control of each switch. Channel−Select Input A controls the X−Switch, Input B controls the Y−Switch and Input C controls the Z−Switch
Figure 5. Logic Diagram − MC74HCT4053A Triple Single−Pole, Double−Position Plus Common Off
12345678 Y1 Y0 Z1 Z Z0 Enable VEE GND Figure 6. Pinout: MC74HCT4053A (Top View)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ VCC Positive DC Supply Voltage (Referenced to GND)
−0.5 to +7.0
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ .