73S1215F System-on-Chip Datasheet

73S1215F Datasheet, PDF, Equivalent


Part Number

73S1215F

Description

80515 System-on-Chip

Manufacture

Teridian Semiconductor

Total Page 30 Pages
Datasheet
Download 73S1215F Datasheet


73S1215F
Simplifying System Integration™
GENERAL DESCRIPTION
The 73S1215F is a versatile and economical
CMOS System-on-Chip device intended for smart
card reader applications. The circuit features an
ISO 7816 / EMV interface, an USB 2.0 interface
(full-speed 12Mbps device) and a 5x6 PINpad
interface. Maximum design flexibility is supported
with additional features such as 9 user I/Os,
multiple interrupt options, up to 4 programmable
current outputs (to drive external LEDs), and 1
analog voltage input (suitable for DC voltage
monitoring such as battery level detection). Other
built-in hardware interfaces include an
asynchronous serial UART and an I2C interface.
The System-on-Chip is built around an 80515 high
performance core. Its feature and instruction set is
compatible with the industry standard 8051, while
offering one clock-cycle per instruction processing
power (most instructions)With a CPU clock running
up to 24MHz, it results in up to 20 MIPS available
that meets the requirements of various encryption
needs such as AES, DES / 3-DES and even RSA
(for PIN encryption for instance). The circuit
requires a single crystal, which frequency can be
between 6MHz and 12MHz. In addition, a 32768
Hz sub-system oscillator (optional) with an
independent real-time-clock counter enables stand-
alone applications to access an RTC value. The
respective 73S1215F embedded memories are;
64KB Flash program memory, 2KB user XRAM
memory, and 256B IRAM memory. In addition to
these memories are independent FIFOs dedicated
to the ISO7816 UART and to the USB interface.
Overall, the 73S1215F offers a cost effective
solution to implement hand-held PINpad smart card
readers - USB connected, serial connected,
standalone or combo – as well as turnkey smart
card reader modules, USB or ExpressCard® type.
Embedded Flash memory is in-system
programmable and lockable by means of on-silicon
fuses. This makes the Teridian 73S1215F suitable
for both development and production phases.
www.DataSheet4U.com
73S1215F
80515 System-on-Chip with USB,
ISO 7816 / EMV, PINpad and More
DATA SHEET
December 2008
Teridian Semiconductor Corporation offers with
its 73S1215F a very comprehensive set of
software libraries, including the smart card and
USB protocol layers that are pre-approved
against USB, Microsoft WHQL and EMV, as
well as a CCID reference design. Refer to the
73S12xxF Software User’s Guide for a
complete description of the Application
Programming Interface (API Libraries) and
related software modules.
A complete array of development and
programming tools, libraries and demonstration
boards enable rapid development and
certification of smart card readers that meet
most demanding smart card standards.
APPLICATIONS
Hand-held PINpad smart card readers:
o Connected through USB, serial or
un-connected
o CCID-compliant
E-banking (MasterCard CAP, etc)
Smart card reader modules for PC laptops
and desktops: ExpressCard® , USB
Digital Identification (Secure Login, Gov’t ID, ...)
General purpose smart card readers
ADVANTAGES
The ideal balance of cost and features for
high volume, USB-connected PINpad type
of applications:
o Larger built-in Flash / RAM than its
competitors
o Higher performance CPU core
o Powerful In-Circuit- Emulation and
Programming
o A complete set of ready-to-use EMV4.1 /
USB / CCID libraries
Rev. 1.4
© 2008 Teridian Semiconductor Corporation
1

73S1215F
73S1215F Data Sheet
FEATURES
80515 Core:
1 clock cycle per instruction (most instructions)
CPU clocked up to 24MHz
64kB Flash memory with security
2kB XRAM (User Data Memory)
256 byte IRAM
Hardware watchdog timer
Oscillators:
Single low-cost 6MHz to 12MHz crystal
Optional 32768 Hz crystal (with internal RTC)
An Internal PLL provides all the necessary
clocks to each block of the system
Interrupts:
Standard 80C515 4-priority level structure
Nine different sources of interrupt to the core
Power Down Modes:
2 standard 80C515 Power Down and IDLE
modes
Extensive device power down mode
Timers:
Two standard 80C52 timers T0 and T1
One 16-bit timer that can generate RTC
interrupts from the 32kHz clock
Built-in ISO-7816 Card Interface:
LDO regulator produces VCC for the card
(1.8V, 3V or 5V)
Full compliance with EMV 4.1
Activation/Deactivation sequencers
Auxiliary I/O lines (C4-C8 signals)
6kV ESD protection on all interface pins
Communication with Smart Cards:
ISO 7816 UART for protocols T=0, T=1
(2) 2-Byte FIFOs for transmit and receive
Configured to drive multiple external Teridian
73S8010x interfaces (for multi-SAM
architectures)
DSw_w1w2.D1a5taFS_he0e0t43U.com
Communication Interfaces:
Full-duplex serial interface (1200 to
115kbps UART)
USB 2.0 Full Speed 12Mbps Interface,
PC/SC compliant with 4 Endpoints:
Control (16B FIFO)
Interrupt IN (32B FIFO)
Bulk IN (128B FIFO)
Bulk OUT (128B FIFO)
I2C Master Interface (400kbps)
Man-Machine Interface and I/Os:
5x6 Keyboard (hardware scanning,
debouncing and scrambling)
Nine User I/Os
Up to 4 programmable current outputs
(LED)
Voltage Detection:
Analog Input (detection range: 1.0V to 1.5V)
Operating Voltage:
2.7V to 3.6V (3V to 3.6V when USB is in use)
4.75 to 5.5V for smart card supply
Operating Temperature:
-40°C to 85°C
Packages:
68-pin QFN
44-pin QFN
Software:
Two-level Application Programming Interface
(ANSI C-language libraries)
USB, T=0/T=1 and EMV-compliant smart card
protocol layers
CCID reference design and Windows® driver
2 Rev. 1.4


Features 73S1215F 80515 System-on-Chip with USB, ISO 7816 / EMV, PINpad and More Simplif ying System Integration™ www.DataShe et4U.com DATA SHEET December 2008 GEN ERAL DESCRIPTION The 73S1215F is a vers atile and economical CMOS System-on-Chi p device intended for smart card reader applications. The circuit features an ISO 7816 / EMV interface, an USB 2.0 in terface (full-speed 12Mbps device) and a 5x6 PINpad interface. Maximum design flexibility is supported with additiona l features such as 9 user I/Os, multipl e interrupt options, up to 4 programmab le current outputs (to drive external L EDs), and 1 analog voltage input (suita ble for DC voltage monitoring such as b attery level detection). Other built-in hardware interfaces include an 2 async hronous serial UART and an I C interfac e. The System-on-Chip is built around a n 80515 high performance core. Its feat ure and instruction set is compatible w ith the industry standard 8051, while o ffering one clock-cycle per instruction processing power (most in.
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