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LP62S16128-T Dataheets PDF



Part Number LP62S16128-T
Manufacturers AMIC Technology
Logo AMIC Technology
Description 128K X 16 BIT LOW VOLTAGE CMOS SRAM
Datasheet LP62S16128-T DatasheetLP62S16128-T Datasheet (PDF)

LP62S16128-T Series 128K X 16 BIT LOW VOLTAGE CMOS SRAM Features n Operating voltage: 2.7V to 3.3V n Access times: 70 ns (max.) n Current: Very low power version: Operating: 35mA (max.) Standby: 10µA (max.) n n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL-compatible Common I/O using three-state output Data retention voltage: 2V (min.) Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages General Description The LP62S16128-T is a low.

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LP62S16128-T Series 128K X 16 BIT LOW VOLTAGE CMOS SRAM Features n Operating voltage: 2.7V to 3.3V n Access times: 70 ns (max.) n Current: Very low power version: Operating: 35mA (max.) Standby: 10µA (max.) n n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL-compatible Common I/O using three-state output Data retention voltage: 2V (min.) Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages General Description The LP62S16128-T is a low operating current 2,097,152bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.7V to 3.3V. It is built using AMIC's high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Pin Configurations n TSOP n CSP (Chip Size Package) 48-pin Top View A4 A3 A2 A1 A0 CE I/O1 I/O2 I/O3 I/O4 VCC GND I/O5 I/O6 I/O7 I/O8 WE A16 A15 A14 A13 A12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE HB LB I/O16 I/O15 I/O14 I/O13 GND VCC I/O12 I/O11 I/O10 I/O9 NC A8 A9 A10 A11 NC 1 A B C D E F G H LB I/O9 I/O10 GND VCC I/O15 I/O16 NC 2 OE HB I/O11 I/O12 I/O13 I/O14 NC A8 3 A0 A3 A5 NC NC A14 A12 A9 4 A1 A4 A6 A7 A16 A15 A13 A10 5 A2 CE I/O2 I/O4 I/O5 I/O6 WE A11 6 NC I/O1 I/O3 VCC GND I/O7 I/O8 NC LP62S16128V-T (August, 2001, Version 1.0) 1 AMIC Technology, Inc. LP62S16128-T Series Block Diagram A0 VCC GND DECODER A15 512 X 4096 MEMORY ARRAY A16 I/O1 COLUMN I/O INPUT DATA CIRCUIT I/O9 INPUT DATA CIRCUIT I/O8 I/O16 CE LB HB OE WE CONTROL CIRCUIT Pin Descriptions -- TSOP Pin No. 1 - 5, 18 – 22, 24 – 27, 42 - 44 6 7 - 10, 13 - 16, 29 - 32, 35 - 38 17 39 40 41 11, 33 12, 34 23, 28 Symbol A0 - A16 CE I/O1 - I/O16 WE LB HB OE VCC GND NC Description Address Inputs Chip Enable Input Data Inputs/Outputs Write Enable Input Lower Byte Enable Input (I/O1 to I/O8) Higher Byte Enable Input (I/O9 to I/O16) Output Enable Input Power Ground No Connection (August, 2001, Version 1.0) 2 AMIC Technology, Inc. LP62S16128-T Series Pin Description - CSP Symbol A0 - A16 Description Address Inputs Symbol HB Description Higher Byte Enable Input (I/O9 - I/O16) Output Enable Power Supply Ground No Connection CE I/O1 - I/O16 WE LB Chip Enable Data Input/Output Write Enable Input Byte Enable Input (I/O1 - I/O8) OE VCC GND NC Recommended DC Operating Conditions (TA = -25°C to + 85°C) Symbol VCC GND VIH VIL CL TTL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Output Load Output Load Min. 2.7 0 2.2 -0.3 Typ. 3 0 Max. 3.3 0 VCC + 0.3 +0.6 30 1 Unit V V V V pF - (August, 2001, Version 1.0) 3 AMIC Technology, Inc. LP62S16128-T Series Absolute Maximum Ratings* VCC to GND ...............................................-0.5V to +4.6V IN, IN/OUT Volt to GND .................... -0.5V to VCC + 0.5V Operating Temperature, Topr ....................-25°C to +85°C Storage Temperature, Tstg......................-55°C to +125°C Power Dissipation, PT ............................................... 0.7W *Comments Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (TA = -25°C to + 85°C, VCC = 2.7V to 3.3V, GND = 0V) Symbol Parameter LP62S16128-70LLT Min. ILI Input Leakage Current Max. 1 µA µA VIN = GND to VCC CE = VIH or LB = VIH or HB = VIH or OE = VIH or WE = VIH VI/O = GND to VCC CE = VIL , II/O = 0Ma Unit Conditions ILO Output Leakage Current - 1 ICC Active Power Supply Current - 5 mA ICC1 Dynamic Operating Current ICC2 - 35 mA Min. Cycle, Duty = 100% CE = VIL, II/O = 0Ma - 5 mA CE = VIL, VIH = VCC, VIL = 0V, f = 1MHz, II/O = 0 Ma CE = VIH CE ≥ VCC – 0.2V, VIN ≥ 0V IOL = 2.1 Ma IOH = -1.0 Ma ISB ISB1 VOL VOH Standby Power Supply Current 2.2 0.5 10 0.4 - mA µA V V Output Low Voltage Output High Voltage (August, 2001, Version 1.0) 4 AMIC Technology, Inc. LP62S16128-T Series Truth Table CE H X OE X X WE X X LB X H L L L H L H L L X L L H L L H H H H L X HB X H L H L L H L X L I/O1 to I/O8 Mode Not selected High-Z Read Read High - Z Write Write Hi - Z High - Z High - Z I/O9 to I/O16 Mode Not selected High-Z Read High - Z Read Write Hi - Z Write High - Z High - Z VCC Current ISB1, ISB ISB1, ISB ICC1, ICC2, ICC ICC1, ICC2, ICC ICC1, ICC2, ICC ICC1, ICC2, ICC ICC1, ICC2, ICC .


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