N25Q128

N25Q128 128-Mbit 3 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface Features SPI-compatible serial bus interface 108 MHz (maximum) clock frequency 2.7 V to 3.6 V single supply voltage Supports legacy SPI protocol and new Quad I/O or Dual I/O SPI protocol Quad/Dual I/O instructions resulting in an equivalent clock frequency up to 432 MHz: XIP mode for all three protocols – Configurable via volatile or non-volatile registers: enables XiP mode directly after power on Program/Erase suspend instructions Continuous read (entire memory) via single instruction: – Fast Read – Quad or Dual Output Fast Read – Quad or Dual I/O Fast Read Flexible to fit application: – Configurable number of dummy cycles – Output buffer configurable – Fast POR instruction: decrease power-on time – Reset function (upon customer request) 64-byte user-lockable, one-time programmable (OTP) area Erase capability – Subsector (4-Kbyte) granularity in the 8 boot sectors (bottom or top parts) – Sector (64-Kbyte) granularity Write protections – Software write protection applicable to every 64-Kbyte sector (volatile lock bit) – Hardware write protection: protected area size defined by non-volatile bits (BP0, BP1, BP2, BP3 and TB bit) – Additional smart protections available upon customer request Electronic signature – JEDEC standard two-byte signature (BA18h) – Additional 2 Extended Device ID (EDID) bytes to identify device factory options – U...