LP62S1664CV-55LLT

LP62S1664C Series Preliminary Document Title 64K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 64K X 16 BIT LOW VOLTAGE CMOS SRAM History Initial issue Issue Date February 19, 2002 Remark Preliminary PRELIMINARY (February, 2002, Version 0.0) AMIC Technology, Inc. LP62S1664C Series Preliminary Features n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns (max.) n Current: LP62S1664C-55 series: Operating: 50mA (max.) Standby: 5µA (max.) LP62S1664C-70 series: Operating: 40mA (max.) Standby: 5µA (max.) n Extended operating temperature range : -40°C to 85°C for -LLI series n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention voltage: 2V (min.) n Available in 44-pin TSOP and 48-ball Mini BGA (6X8) packages. 64K X 16 BIT LOW VOLTAGE CMOS SRAM General Description The LP62S1664C is a low operating current 1,048,576bit static random access memory organized as 65,536 words by 16 bits and operates on low power supply voltage from 2.7V to 3.6V. It is built using AMIC’s high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Product Family Pro...