EDS2532AABJ-75

www.DataSheet4U.com DATA SHEET 256M bits SDRAM EDS2532AABJ-75 (8M words × 32 bits) Specifications Density: 256M bits Organization ⎯ 2M words × 32 bits × 4 banks Package: 90-ball FBGA ⎯ Lead-free (RoHS compliant) Power supply: VDD, VDDQ = 3.3V ± 0.3V Clock frequency: 133MHz (max.) 2KB page size ⎯ Row address: A0 to A11 ⎯ Column address: A0 to A8 Four internal banks for concurrent operation Interface: LVTTL Burst lengths (BL): 1, 2, 4, 8, full page Burst type (BT): ⎯ Sequential (1, 2, 4, 8, full page) ⎯ Interleave (1, 2, 4, 8) /CAS Latency (CL): 2, 3 Precharge: auto precharge operation for each burst access Refresh: auto-refresh, self-refresh Refresh cycles: 4096 cycles/64ms ⎯ Average refresh period: 15.6μs Operating ambient temperature range ⎯ TA = 0°C to +70°C Pin Configurations /xxx indicates active low signal. 90-ball FBGA 1 2 3 4 5 6 7 8 9 A DQ26 DQ24 VSS VDD DQ23 DQ21 VDDQ VSSQ DQ19 DQ22 DQ20 VDDQ DQ17 DQ18 VDDQ NC A2 A10 NC BA0 /CAS VDD DQ6 DQ1 DQ16 VSSQ DQM2 VDD A0 BA1 /CS A1 A11 /RAS EO Features B DQ28 VDDQ VSSQ C VSSQ DQ27 DQ25 D VSSQ DQ29 DQ30 E VDDQ DQ31 NC A3 A6 NC A9 NC VSS F VSS DQM3 ×32 organization Single pulsed /RAS Burst read/write operation and burst read/single write operation capability Byte control by DQM Document No. E0508E40 (Ver. 4.0) Date Published December 2005 (K) Japan Printed in Japan URL: http://www.elpida.com L G A4 A5 A8 CKE NC H A7 J CLK K DQM1 /WE DQM0 DQ7 VSSQ DQ5 VDDQ DQ3 VDDQ Pr L M N...