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MB96F356 Dataheets PDF



Part Number MB96F356
Manufacturers Fujitsu
Logo Fujitsu
Description 16-bit Proprietary Microcontroller
Datasheet MB96F356 DatasheetMB96F356 Datasheet (PDF)

FUJITSU SEMICONDUCTOR DATA SHEET FME-MB96350 rev 7 16-bit Proprietary Microcontroller CMOS F2MC-16FX MB96350 Series MB96F353/F355 MB96F356 ■ DESCRIPTION MB96350 series is based on Fujitsu’s advanced 16FX architecture (16-bit with instruction pipeline for RISC-like performance). The CPU uses the same instruction set as the established 16LX series - thus allowing for easy migration of 16LX Software to the new 16FX products. 16FX improvements compared to the previous generation include significan.

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FUJITSU SEMICONDUCTOR DATA SHEET FME-MB96350 rev 7 16-bit Proprietary Microcontroller CMOS F2MC-16FX MB96350 Series MB96F353/F355 MB96F356 ■ DESCRIPTION MB96350 series is based on Fujitsu’s advanced 16FX architecture (16-bit with instruction pipeline for RISC-like performance). The CPU uses the same instruction set as the established 16LX series - thus allowing for easy migration of 16LX Software to the new 16FX products. 16FX improvements compared to the previous generation include significantly improved performance - even at the same operation frequency, reduced power consumption and faster start-up time. For highest processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 56MHz operation frequency from an external 4MHz resonator. The result is a minimum instruction cycle time of 17.8ns going together with excellent EMI behavior. An on-chip clock modulation circuit significantly reduces emission peaks in the frequency spectrum. The emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU voltage. A flexible clock tree allows to select suitable operation frequencies for peripheral resources independent of the CPU speed. Note: F2MC is the abbreviation of Fujitsu Flexible Microcontroller For the information for microcontroller supports, see the following web site. This web site includes the "Customer Design Review Supplement" which provides the latest cautions on system development and the minimal requirements to be checked to prevent problems before the system development. http://edevice.fujitsu.com/micom/en-support/ Copyright©2010 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2010.6 www.DataSheet.in MB96350 Series ■ FEATURES Feature Technology • 0.18µm CMOS • F2MC-16FX CPU • Up to 56 MHz internal, 17.8 ns instruction cycle time CPU • Optimized instruction set for controller applications (bit, byte, word and long-word data types; 23 different addressing modes; barrel shift; variety of pointers) • 8-byte instruction execution queue • Signed multiply (16-bit × 16-bit) and divide (32-bit/16-bit) instructions available • On-chip PLL clock multiplier (x1 - x25, x1 when PLL stop) • 3 MHz - 16 MHz external crystal oscillator clock (maximum frequency when using ceramic resonator depends on Q-factor). • Up to 56 MHz external clock • 32-100 kHz subsystem quartz clock System clock • 100kHz/2MHz internal RC clock for quick and safe startup, oscillator stop detection, watchdog • Clock source selectable from main- and subclock oscillator (part number suffix “W”) and on-chip RC oscillator, independently for CPU and 2 clock domains of peripherals. • Low Power Consumption - 13 operating modes : (different Run, Sleep, Timer modes, Stop mode) • Clock modulator On-chip voltage regula- • Internal voltage regulator supports reduced internal MCU voltage, offering low EMI tor and low power consumption figures Low voltage reset Code Security Memory Patch Function DMA Interrupts • Reset is generated when supply voltage is below minimum. • Protects ROM content from unintended read-out • Replaces ROM content • Can also be used to implement embedded debug support • Automatic transfer function independent of CPU, can be assigned freely to resources • Fast Interrupt processing • 8 programmable priority levels • Non-Maskable Interrupt (NMI) Timers • Three independent clock timers (23-bit RC clock timer, 23-bit Main clock timer, 17-bit Sub clock timer) • Watchdog Timer Description 2 FME-MB96350 rev 7 www.DataSheet.in MB96350 Series Feature • ISO16845 certified • Bit rates up to 1 Mbit/s • 32 message objects CAN • Each message object has its own identifier mask • Programmable FIFO mode (concatenation of message objects) • Maskable interrupt • Disabled Automatic Retransmission mode for Time Triggered CAN applications • Programmable loop-back mode for self-test operation • Full duplex USARTs (SCI/LIN) USART • Wide range of baud rate settings using a dedicated reload timer • Special synchronous options for adapting to different synchronous serial protocols • LIN functionality working either as master or slave LIN device I2C • Up to 400 kbps • Master and Slave functionality, 7-bit and 10-bit addressing • SAR-type A/D converter • 10-bit resolution • Signals interrupt on conversion end, single conversion mode, continuous conversion mode, stop conversion mode, activation by software, external trigger or reload timer • 16-bit wide Reload Timers • Prescaler with 1/21, 1/22, 1/23, 1/24, 1/25, 1/26 of peripheral clock frequency • Event count function Free Running Timers • Signals an interrupt on overflow, supports timer clear upon match with Output Compare (0, 4), Prescaler with 1, 1/21, 1/22, 1/23, 1/24, 1/25, 1/26, 1/27,1/28 of peripheral clock frequency • 16-bit wide Input Capture Units • Signals an interrupt upon external event • Rising edge, falling edge or rising & falling edge sensitive • 16-bit wide Output Compare Units • Signals an interrupt whe.


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