HY5S5B6ELFP-SE

256MBit MOBILE SDR SDRAMs based on 4M x 4Bank x16 I/O Document Title 4Bank x 4M x 16bits Synchronous DRAM Revision History Revision No. 0.1 0.2 0.3 1.0 Initial Draft Modification of IDD Current Modification of IDD3P & IDD3PS IDD3P / IDD3PS : 3mA / 2mA --> 5mA / 5mA Final revision History Draft Date Aug. 2004 Oct. 2004 Jan. 2005 Jul. 2005 Remark Preliminary Preliminary Preliminary This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.0 / Jul. 2005 1 1 256Mbit (16Mx16bit) Mobile SDR Memory HY5S5B6ELF(P)-xE Series DESCRIPTION The Hynix Low Power SDRAM(Mobile SDR) is suited for non-PC application which use the batteries such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, handheld PCs. The Hynix HY5S5B6ELF(P) is a 268,435,456bit CMOS Synchronous Dynamic Random Access Memory. It is organized as 4banks of 4,194,304x16. The Low Power SDRAM(Mobile SDR) provides for programmable options including CAS latency of 1, 2, or 3, READ or WRITE burst length of 1, 2, 4, 8, or full page, and the burst count sequence(sequential or interleave). And the Low Power SDRAM(Mobile SDR) also provides for special programmable options including Partial Array Self Refresh of a quarter bank, a half bank, 1bank, 2banks, or all banks. The Hynix HY5S5B6ELF(P) has the special Low Power function of Auto TCSR(Tempe...