ISPGAL22V10

Specifications ispGAL22V10 ispGAL22V10 In-System Programmable E2CMOS PLD Generic Array Logic™ FEATURES IN-SYSTEM PROGRAMMABLE™ (5-V ONLY) — 4-Wire Serial Programming Interface — Minimum 10,000 Program/Erase Cycles — Built-in Pull-Down on SDI Pin Eliminates Discrete Resistor on Board (ispGAL22V10C Only) HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 111 MHz — 5 ns Maximum from Clock Input to Data Output — UltraMOS® Advanced CMOS Technology ACTIVE PULL-UPS ON ALL LOGIC INPUT AND I/O PINS COMPATIBLE WITH STANDARD 22V10 DEVICES — Fully Function/Fuse-Map/Parametric Compatible with Bipolar and CMOS 22V10 Devices E2 CELL TECHNOLOGY — In-System Programmable Logic — 100% Tested/100% Yields — High Speed Electrical Erasure (<100ms) — 20 Year Data Retention TEN OUTPUT LOGIC MACROCELLS — Maximum Flexibility for Complex Logic Designs APPLICATIONS INCLUDE: — DMA Control — State Machine Control — High Speed Graphics Processing — Software-Driven Hardware Configuration ELECTRONIC SIGNATURE FOR IDENTIFICATION DESCRIPTION PIN CONFIGURATION The ispGAL22V10, at 7.5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the industry's first in-system programmable 22V10 device. E2 technology offers high speed (<100ms) erase times, providing the ability to reprogram or reconfigure the device quickly and efficiently. The generic architecture provides maximum design...