X76F101 Datasheet: Secure SerialFlash





X76F101 Secure SerialFlash Datasheet

Part Number X76F101
Description Secure SerialFlash
Manufacture IC MICROSYSTEMS
Total Page 17 Pages
PDF Download Download X76F101 Datasheet PDF

Features: This X76F101 device has been acquired by IC MICROSYSTEMS from Xicor, Inc. ICmi c TM IC MICROSYSTEMS 1K X76F101 Secu re SerialFlash DESCRIPTION 128 x 8 bit FEATURES •64-bit Password Security •One Array (112 Bytes) Two Passwords —Read Password —Write Password The X76F101 is a Password Access Security Supervisor, containing one 896-bit Secu re Serial Flash array. Access to the me mory array can be controlled by two 64- bit passwords. These passwords protect read and write •Programmable Passwor ds •32-bit Response to Reset (RST Inp ut) •8 byte Sector Write mode operat ions of the memory array. The X76F101 f eatures a serial interface and software protocol allowing operation on a popul ar two wire bus. The bus signals are a clock Input (SCL) and a bidirectional d ata input and output (SDA). Access to t he device is controlled through a chip select (CS) input, allowing any number of devices to share the same bus. The X 76F101 also features a synchronous response to reset providing an automatic o.

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This X76F101 device has been acquired by
IC MICROSYSTEMS from Xicor, Inc.
1K X76F101
ICmicTM
IC MICROSYSTEMS
128 x 8 bit
Secure SerialFlash
FEATURES
•64-bit Password Security
•One Array (112 Bytes) Two Passwords
—Read Password
—Write Password
•Programmable Passwords
•32-bit Response to Reset (RST Input)
•8 byte Sector Write mode
•1MHz Clock Rate
•2 wire Serial Interface
•Low Power CMOS
—3.0 to 5.5V operation
—Standby current Less than 1µA
—Active current less than 3 mA
•High Reliability Endurance:
—100,000 Write Cycles
•Data Retention: 100 years
•Available in:
—8 lead PDIP, SOIC, MSOP and ISO Card
—SmartCard Module
DESCRIPTION
The X76F101 is a Password Access Security Supervisor,
containing one 896-bit Secure Serial Flash array. Access
to the memory array can be controlled by two 64-bit
passwords. These passwords protect read and write
operations of the memory array.
The X76F101 features a serial interface and software
protocol allowing operation on a popular two wire bus.
The bus signals are a clock Input (SCL) and a bidirectional
data input and output (SDA). Access to the
device is controlled through a chip select (CS) input,
allowing any number of devices to share the same bus.
The X76F101 also features a synchronous response to reset
providing an automatic output of a hard-wired 32-bit
data stream conforming to the industry standard for
memory cards.
The X76F101 utilizes Xicor’s proprietary Direct WrTitMe
cell, providing a minimum endurance of 100,000 cycles and
a minimum data retention of 100 years.
Functional Diagram
CS
SCL
SDA
Interface
Logic
RST
www.DataSheet4U.com
CHIP ENABLE
DATA TRANSFER
ARRAY ACCESS
ENABLE
PASSWORD ARRAY
AND PASSWORD
VERIFICATION LOGIC
RESET
RESPONSE REGISTER
8K BYTE
SerialFlash ARRAY
ARRAY 0
(PASSWORD PROTECTED)
112 Byte
32 BYTE
SerialFlash ARRAY
ARRAY 1
(PASSWORD PROTECTED)
RETRY COUNTER
7025 FM 01
©Xicor, Inc. 1994, 1995, 1996 Patents Pending
7065 -1.1 4/17/98 T2/C0/D0 SH
1
Characteristics subject to change without notice

                    
                    






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