SCG6500NT

SCG6500NT Synchronous Clock Generator PLL 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630- 851- 4722 Fax: 630- 851- 5040 www.conwin.com Features Digital PLL Control 622.08 MHz LVPECL Output, Ultra-low Jitter 155.52 MHz LVPECL Output, Ultra-low Jitter Two 77.76 MHz LVPECL Outputs, Low Litter 8 kHz LVPECL Output Dual 8 kHz Input References Supports Manual and Autonomous Modes 3.3 VDC Power Supply Applications www.DataSheet4U.com Bulletin Page Revision Date Issued By SG034 1 of 12 (ADVANCED) A05 24 JUNE 02 MBatts The SCG6500NT is designed for use as a reference input for OC-192 Framers and SERDES. It generates less than 1 psRMS jitter over the OC-192 bandwidth. SCG6500NT is well suited for use in line cards, service termination cards and similar functions to provide reliable reference, phase locked, synchronization for TDM, PDH, SONET, and SDH network equipment. The SCG6500NT provides a jitter filtered, wander following output signal synchronized to a superior Stratum or peer input reference signal. General Description The SCG6500NT unit provides high precision phase lock loop frequency translation for the telecommunication applications. The SCG6500NT unit generates LVPECL outputs from an intrinsically low jitter, voltage controlled crystal oscillator. The SCG6500NT unit can be configured to provide a jitter attenuated, internal reference. SCG6500NT is well suited for use in line cards, service termination cards and similar functions to provide r...