Document
FAN6921ML — Integrated Critical Mode PFC / Quasi-Resonant Current Mode PWM Controller
March 2016
FAN6921ML Integrated Critical Mode PFC/Quasi-Resonant Current Mode PWM Controller
Features
Integrated PFC and Flyback Controller Critical Mode PFC Controller Zero-Current Detection for PFC Stage Quasi-Resonant Operation for PWM Stage Internal Minimum tOFF 8 µs for QR PWM Stage Internal 10 ms Soft-Start for PWM Brownout Protection H/L Line Over-Power Compensation (OPC) Latched Protection (FB Pin)
Over-Power/ Overload Protection Short-Circuit Protection Open-Loop Protection
Externally Latch Triggering (RT Pin) Adjustable Over-Temperature Latched (RT Pin) VDD Pin & Output Voltage OVP (Latched) Internal Temperature Shutdown (140°C)
Applications
AC/DC NB Adapters Open-Frame SMPS Battery Charger
Description
The highly integrated FAN6921ML combines a Power Factor Correction (PFC) controller and a QuasiResonant PWM controller. Integration provides costeffect design and allows for fewer external components.
For PFC, FAN6921ML uses a controlled on-time technique to provide a regulated DC output voltage and to perform natural power factor correction. With an innovative THD optimizer, FAN6921ML can reduce input current distortion at zero-crossing duration to improve THD performance.
For PWM, FAN6921ML enhances the power system performance through valley detection, green-mode operation, and high / low line over power compensation. FAN6921ML provides: secondary-side open-loop and over-current protection, external latch triggering, adjustable over-temperature protection by RT pin and external NTC resistor, internal over-temperature shutdown, VDD pin OVP, and DET pin over-voltage for output OVP, and brown-in/out for AC input voltage under-voltage protection (UVP).
The FAN6921ML controller is available in a 16-pin small outline package (SOP).
Ordering Information
Part Number
OLP Mode
Operating Temperature Range
Package
FAN6921MLMY
Latch
-40°C to +105°C 16-Pin Small Outline Package (SOP)
Packing Method
Tape & Reel
© 2010 Fairchild Semiconductor Corporation FAN6921ML • Rev. 1.7
www.fairchildsemi.com
FAN6921ML — Integrated Critical Mode PFC / Quasi-Resonant Flyback PWM Controller
Application Diagram
14
6
4
3
1 16
ZCD OPFC CSPFC INV RANGE HV
13 VIN
GND
9
FAN6921
NC 15 OPWM 8
COMP RT FB DET VDD CSPWM 5
2
12 11 10 7
Figure 1. Typical Application
© 2010 Fairchild Semiconductor Corporation
FAN6921ML • Rev. 1.7
2
www.fairchildsemi.com
FAN6921ML — Integrated Critical Mode PFC / Quasi-Resonant Flyback PWM Controller
Internal Block Diagram
COMP
HV
VDD
INV CSPFC
FB CSPWM
DET
2
RANGE
2.65V
Multi-Vector Amp.
2.75V
RANGE
2.75V 2.9V
2.3V
0.45V
16
7
IHV OVP
27.5V
OVP Latched
Two Steps UVLO
18V/10V/7.5V
UVP
Debounce 70µs
3
Latched
Brownout
S SET Q R CLR Q
Internal Bias
15 NC
DRV 15.5V
6 OPFC
4
11
2.5V
THD Optimizer
Blanking Circuit
0.6V
PFC Current Limit
VCTL-PFC-ON/OFF
Debounce 550ms / 150µs
Soft-Start 9.5ms
4.2V 2R
R
Timer
50ms
2.5ms
VB
32.5µs
Starter
Sawtooth Generator /tON-MAX-PFC
Restarter
Disable Function
0.2V
Inhibit Timer
VC & PFC ON/OFF & Multi Vector Amp. ON/OFF
0.7V
PFC Zero Current Detector 2.1V/1.75V
14
10V IZCD
FB OLP
DRV
S SET Q
8
Blanking
5
Circuit
R CLR Q
17.5V
Over Power Compensation
PWM Current Limit
IDET
DET pin OVP VDD pin OVP
Internal OTP
tOFF-MIN
IDET
Valley
(8us/37µs/2.5ms)
Detector
1st Valley
tOFF-MIN +9µs
(RT Pin) Prog. OTP
Brownout Protection
(RT Pin) Externally Triggering Output Short Circuit (FB
Latched
Pin)
Output Open-Loop (FB Pin)
Output Over Power/ Overload (FB Pin)
Lathed Protection
tOFF Blanking
(4µs)
VDET S/H
2.5V
Latched
DET OVP
VC Latched
Debounce Time
Startup
VB & clamp
1
VCOMP to 1.6V
10
0.3V
IRT 100uA
0.8V
1.2V 0.8V VINV VINV
Brownout
Debounce 100ms
5V
IDET
1V/1.2V
comparator
Debounce 100ms
100us
Internal OTP
Latched
0.5V
10ms
Prog. OTP
2.35V/2.15V
9
/ Externally Triggering
12
13
PFC RANGE Control
ZCD OPWM
RANGE
GND
RT
VIN
Figure 2. Functional Block Diagram
© 2010 Fairchild Semiconductor Corporation
FAN6921ML • Rev. 1.7
3
www.fairchildsemi.com
FAN6921ML — Integrated Critical Mode PFC / Quasi-Resonant Flyback PWM Controller
Marking Information
16
ZXYTT FAN6921FO
TPM
1
- Fairchild Logo
Z - Plant Code X - Year Code (1 Digit for SOP, 2 Digits for DIP) Y - Week Code (1 Digit for SOP, 2 Digits for DIP) TT – DIe-Run Code F - Frequency (M=Low, H=High Level) O - OLP Mode (L=Latch, R=Recovery) T - Package Type (N=DIP, M=SOP) P – Y=Green Package M - Manufacture Flow Code
Figure 3. Marking Diagram
Pin Configuration
RANGE
1
COMP
2
INV
3
CSPFC
4
CSPWM 5
OPFC
6
VDD
7
OPWM
8
16
HV
15
N.C.
14
ZCD
13
VIN
12
RT
11
FB
10
DET
9
GND
Figure 4. Pin Configuration
Pin Definitions
Pin # Name
Description
RANGE pin’s impedance changes .