LS3550C

LS3550C MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550C is a monolithic pair of PNP transistors mounted in a single P-DIP package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching. The 8 Pin P-DIP provides ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information). LS3550C Features: ƒ FEATURES  EXCELLENT THERMAL TRACKING   TIGHT VBE MATCHING  ABSOLUTE MAXIMUM RATINGS 1  @ 25°C (unless otherwise noted)  Maximum Temperatures  Storage Temperature  Operating Junction Temperature  Maximum Power Dissipation  Continuous Power Dissipation   Maximum Currents  Collector Current  Maximum Voltages  Collector to Collector Voltage    MIN  ‐‐  ‐‐  ‐‐  ‐‐  ‐‐  TYP  ‐‐  ‐‐  ‐‐  ‐‐  ‐‐  MAX  10  15  10  1.0  15  UNITS  mV  µV/°C  nA  nA/°C  %  ≤ 15µV/°C  |VBE1 – VBE2 | ≤10mV   ‐65°C to +150°C  ‐55°C to +150°C  www.DataSheet4U.com TBD  10mA  80V    CONDITIONS  IC = ‐10mA, VCE = ‐5V  IC = ‐10mA, VCE = ‐5V  TA = ‐40°C to +85°C  IC = ‐10µA, VCE = ‐5V  IC = ‐10µA, VCE = ‐5V  TA = ‐40°C to +85°C  IC = 10µA, VCE = 5V  ƒ Tight matching Low Output Capacitance MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated)  SYMBOL  CHARACTERISTIC  |VBE1 – VBE2 |  Base Emitter Voltage Differential  ∆|(VBE1 – VBE2)| / ∆T  Base Emitter Voltage Differential    Change with Temperature  |IB1 – IB2 |  Base Current Differential  |∆ (IB1 – IB2)|/∆T  ...