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UPD78F0512 Dataheets PDF



Part Number UPD78F0512
Manufacturers Renesas Electronics
Logo Renesas Electronics
Description 8-bit Single-Chip Microcontrollers
Datasheet UPD78F0512 DatasheetUPD78F0512 Datasheet (PDF)

User’s Manual 78K0/KC2 8-bit Single-Chip Microcontrollers μPD78F0511 μPD78F0512 μPD78F0513 μPD78F0514 μPD78F0515 μPD78F0513D μPD78F0515D μPD78F0511(A) μPD78F0512(A) μPD78F0513(A) μPD78F0514(A) μPD78F0515(A) μPD78F0511(A2) μPD78F0512(A2) μPD78F0513(A2) μPD78F0514(A2) μPD78F0515(A2) The μPD78F0513D and 78F0515D have on-chip debug functions. Do not use these products for mass production because its reliability cannot be guaranteed after the on-chip debug function has been used, due to issues w.

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User’s Manual 78K0/KC2 8-bit Single-Chip Microcontrollers μPD78F0511 μPD78F0512 μPD78F0513 μPD78F0514 μPD78F0515 μPD78F0513D μPD78F0515D μPD78F0511(A) μPD78F0512(A) μPD78F0513(A) μPD78F0514(A) μPD78F0515(A) μPD78F0511(A2) μPD78F0512(A2) μPD78F0513(A2) μPD78F0514(A2) μPD78F0515(A2) The μPD78F0513D and 78F0515D have on-chip debug functions. Do not use these products for mass production because its reliability cannot be guaranteed after the on-chip debug function has been used, due to issues with respect to the number of times the flash memory can be rewritten. NEC Electronics does not accept complaints concerning these products. Document No. U17336EJ5V0UD00 (5th edition) Date Published February 2007 N CP(K) 2005 www.DataSheet4U.net Printed in Japan [MEMO] 2 User’s Manual U17336EJ5V0UD NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN). 2 HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device. 3 PRECAUTION AGAINST ESD A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices. 4 STATUS BEFORE INITIALIZATION Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions. 5 POWER ON/OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. 6 INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. User’s Manual U17336EJ5V0UD 3 EEPROM is a trademark of NEC Electronics Corporation. Windows and Windows NT are registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. PC/AT is a trademark of International Business Machines Corporation. HP9000 series 700 and HP-UX are trademarks of Hewlett-Packard Company. SPARCstation is a trademark of SPARC International, Inc. Solaris and SunOS are trademarks of Sun Microsystems, Inc. SuperFlash is a registered trademark .


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