Buffer Gate. HD74LV1G125A Datasheet

HD74LV1G125A Gate. Datasheet pdf. Equivalent

Part HD74LV1G125A
Description Bus Buffer Gate
Feature HD74LV1G125A Bus Buffer Gate with 3–state Output ADE-205-323C (Z) 4th. Edition April 2001 www.DataS.
Manufacture Hitachi Semiconductor
Total Page 11 Pages
Datasheet
Download HD74LV1G125A Datasheet



HD74LV1G125A
HD74LV1G125A
Bus Buffer Gate with 3–state Output
www.DataSheet4U.net
Description
ADE-205-323C (Z)
4th. Edition
April 2001
The HD74LV1G125A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled
when the associated output enable (OE) input is high. To ensure the high impedance state during power up
or power down, OE should be connected to VCC through a pull-down resistor; the minimum value of the
resistor is determined by the current souring capability of the driver. Low voltage and high speed operation
is suitable for the battery powered products (e.g., notebook computers), and the low power consumption
extends the battery life.
Features
The basic gate function is lined up as hitachi uni logic series.
Supplied on emboss taping for high speed automatic mounting.
Electrical characteristics equivalent to the HD74LV125A
Supply voltage range : 1.65 to 5.5 V
Operating temperature range : –40 to +85°C
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V, Output : Z)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.



HD74LV1G125A
HD74LV1G125A
Outline and Article Indication
• HD74LV1G125A
Index band
Marking
LB
CMPAK–5
HD74LV1G125A
= Control code
( or blank)
Marking
LB
VSON-5
= Control code
2





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