Multiple-Function Gate. HD74LV1GW97A Datasheet

HD74LV1GW97A Gate. Datasheet pdf. Equivalent

Part HD74LV1GW97A
Description Configurable Multiple-Function Gate
Feature HD74LV1GW97A Configurable Multiple–Function Gate REJ03D0083-0300 Rev.3.00 May 19, 2006 www.DataSheet.
Manufacture Renesas Technology
Datasheet
Download HD74LV1GW97A Datasheet



HD74LV1GW97A
HD74LV1GW97A
Configurable Multiple–Function Gate
REJ03D0083-0300
Rev.3.00
May 19, 2006
www.DatDaSehesetc4Ur.nipet tion
The HD74LV1GW97A has configurable multiple–function gate in a 6 pin package. The Output state is determined by
eight patterns of 3–bit input. The user can choose the logic functions AND, NAND, OR, NOR, INVERTER, Non–
Invert Buffer, Data Selector. Low voltage and high-speed operation is suitable for the battery powered products (e.g.,
notebook computers), and the low power consumption extends the battery life.
Features
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
Supply voltage range : 1.65 to 5.5 V
Operating temperature range : –40 to +85°C
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LV1GW97ACME CMPAK-6 pin
PTSP0006JA-A
(CMPAK-6V)
CM
Taping
Abbreviation (Quantity)
E (3,000 pcs / Reel)
Outline and Article Indication
• HD74LV1GW97A
Index band
Marking
W2
CMPAK–6
= Control code
Rev.3.00, May 19, 2006 page 1 of 8



HD74LV1GW97A
HD74LV1GW97A
Function Table
Inputs
Output
IN2 IN1 IN0
Y
LLLL
L LHL
LHLH
L HHH
HL L L
H L HH
HHL L
HHHH
H : High level
L : Low level
Pin Arrangement
Logic Diagram
IN0
IN1
IN2
IN1 1
GND 2
IN0 3
6 IN2
5 VCC
4Y
(Top view)
Y
Rev.3.00, May 19, 2006 page 2 of 8





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