Clock Generator. CY25000 Datasheet

CY25000 Generator. Datasheet pdf. Equivalent

Part CY25000
Description Programmable Spread Spectrum Clock Generator
Feature CY25000 Programmable Spread Spectrum Clock Generator for EMI Reduction Features www.DataSheet4U.net.
Manufacture Cypress Semiconductor
Total Page 10 Pages
Datasheet
Download CY25000 Datasheet



CY25000
CY25000
Programmable Spread Spectrum
Clock Generator for EMI Reduction
Features
• Wide operating output (SSCLK) frequency range
www.DataSheet4U.net
— 3–200 MHz
• Programmable spread spectrum with nominal 30-kHz
modulation frequency
— Center spread: ±0.25% to ±2.5%
— Down spread: –0.5% to –5.0%
• Input frequency range
— External crystal: 8–30 MHz fundamental crystals
— External reference: 8–166 MHz Clock
• Integrated phase-locked loop (PLL)
• Programmable crystal load capacitor tuning array
• Low cycle-to-cycle Jitter
• 3.3V operation
• Spread spectrum On/Off function
• Power-down or Output Enable function
Benefits
• Services most PC peripherals, networking, and consumer
applications.
• Provides wide range of spread percentages for maximum
EMI reduction, to meet regulatory agency Electro Magnetic
Compliance (EMC) requirements. Reduces development
and manufacturing costs and time-to-market.
• Eliminates the need for expensive and difficult to use higher
order crystals.
• Internal PLL to generate up to 200-MHz output. Able to
generate custom frequencies from an external crystal or a
driven source.
• Enables fine-tuning of output clock frequency by adjusting
CLoad of the crystal. Eliminates the need for external CLoad
capacitors.
• Suitable for most PC, consumer, and networking applica-
tions
• Application compatibility in standard and low-power
systems.
• Provides ability to enable or disable spread spectrum with
an external pin.
• Enables low-power state or output clocks to High-Z state.
Logic Block Diagram
XIN/CLKIN 1
XOUT 8
CXOUT
OSC.
CXIN
PLL
with
Modulation Control
Programmable Configuration
PD#/OE 3
SSON 7
24
VDD VSS
Output
Dividers
and
MUX
6 REFCLK
5 SSCLK
Pin Configuration
CY25000
8-pin SOIC
XIN/CLKIN
VDD
PD#/OE
VSS
1
2
3
4
8 XOUT
7 SSON
6 REFCLK
5 SSCLK
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07424 Rev. *B
Revised September 26, 2003



CY25000
CY25000
Pin Descriptions
Pin
1
2
3
4
5
6
7
8
Name
XIN/CLKIN
VDD
PD#/OE
VSS
SSCLK
REFCLK
SSON
XOUT
Description
Crystal input or reference clock input.
3.3V voltage supply.
Power-down pin. Active LOW. If PD# = 0, SSCLK and REFCLK are three-stated.
Output Enable pin: Active HIGH. If OE = 1, SSCLK and REFCLK are enabled.
User has the option of choosing either PD# or OE function.
GND.
Spread spectrum clock output.
Buffered reference output.
Spread spectrum control. 1 = Spread on. 0 = Spread off.
Crystal output. Leave this pin floating if external clock is used.
General Description
The CY25000 is a Spread Spectrum Clock Generator (SSCG)
IC used for the purpose of reducing Electro Magnetic Inter-
ference (EMI) found in today’s high-speed digital electronic
systems.
The device uses a Cypress-proprietary PLL and Spread
Spectrum Clock (SSC) technology to synthesize and modulate
the frequency of the input clock. By frequency modulating the
clock, the measured EMI at the fundamental and harmonic
frequencies are greatly reduced. This reduction in radiated
energy can significantly reduce the cost of complying with
regulatory agency requirements (EMC) and improve time to
market without degrading system performance.
The CY25000 uses a factory-programmable configuration
memory array to synthesize output frequency, spread %,
crystal load capacitor, reference clock on/off and PD#/OE
options.
The spread % is factory programmed to either center spread
or down spread with various spread percentages. The range
for center spread is from ±0.25% to ±2.50%. The range for
down spread is from –0.5% to –5.0%. Contact the factory for
smaller or larger spread % amounts if required.
The input to the CY25000 can be either a crystal or a clock
signal. The input frequency range for crystals is 8–30 MHz,
and for clock signals is 8–166 MHz.
The CY25000 has two clock outputs, REFCLK and SSCLK.
The non-spread spectrum REFCLK output has the same
frequency as the input of the CY25000. The frequency
modulated SSCLK output can be programmed from 3–200
MHz.
The CY25000 products are available in an 8-pin SOIC
(150-mil) package with a commercial operating temperature
range of 0 to 70°C.
Document #: 38-07424 Rev. *B
Page 2 of 10





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