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CY25000 Dataheets PDF



Part Number CY25000
Manufacturers Cypress Semiconductor
Logo Cypress Semiconductor
Description Programmable Spread Spectrum Clock Generator
Datasheet CY25000 DatasheetCY25000 Datasheet (PDF)

CY25000 Programmable Spread Spectrum Clock Generator for EMI Reduction Features www.DataSheet4U.net Benefits • Services most PC peripherals, networking, and consumer applications. • Provides wide range of spread percentages for maximum EMI reduction, to meet regulatory agency Electro Magnetic Compliance (EMC) requirements. Reduces development and manufacturing costs and time-to-market. • Eliminates the need for expensive and difficult to use higher order crystals. • Internal PLL to generate up.

  CY25000   CY25000


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CY25000 Programmable Spread Spectrum Clock Generator for EMI Reduction Features www.DataSheet4U.net Benefits • Services most PC peripherals, networking, and consumer applications. • Provides wide range of spread percentages for maximum EMI reduction, to meet regulatory agency Electro Magnetic Compliance (EMC) requirements. Reduces development and manufacturing costs and time-to-market. • Eliminates the need for expensive and difficult to use higher order crystals. • Internal PLL to generate up to 200-MHz output. Able to generate custom frequencies from an external crystal or a driven source. • Enables fine-tuning of output clock frequency by adjusting CLoad of the crystal. Eliminates the need for external CLoad capacitors. • Suitable for most PC, consumer, and networking applications • Application compatibility in standard and low-power systems. • Provides ability to enable or disable spread spectrum with an external pin. • Enables low-power state or output clocks to High-Z state. • Wide operating output (SSCLK) frequency range — 3–200 MHz • Programmable spread spectrum with nominal 30-kHz modulation frequency — Center spread: ±0.25% to ±2.5% — Down spread: –0.5% to –5.0% • Input frequency range — External crystal: 8–30 MHz fundamental crystals — External reference: 8–166 MHz Clock • Integrated phase-locked loop (PLL) • Programmable crystal load capacitor tuning array • Low cycle-to-cycle Jitter • 3.3V operation • Spread spectrum On/Off function • Power-down or Output Enable function Logic Block Diagram XIN/CLKIN 1 XOUT 8 CXOUT OSC. CXIN PLL with Modulation Control Output Dividers and MUX 6 REFCLK 5 SSCLK Pin Configuration CY25000 8-pin SOIC XIN/CLKIN VDD PD#/OE VSS 1 2 3 4 8 7 6 5 XOUT SSON REFCLK SSCLK Programmable Configuration PD#/OE 3 SSON 7 2 4 VDD VSS Cypress Semiconductor Corporation Document #: 38-07424 Rev. *B • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Revised September 26, 2003 CY25000 Pin Descriptions Pin 1 2 3 4 5 6 7 8 Name XIN/CLKIN VDD PD#/OE VSS SSCLK REFCLK SSON XOUT 3.3V voltage supply. Power-down pin. Active LOW. If PD# = 0, SSCLK and REFCLK are three-stated. Output Enable pin: Active HIGH. If OE = 1, SSCLK and REFCLK are enabled. User has the option of choosing either PD# or OE function. GND. Spread spectrum clock output. Buffered reference output. Spread spectrum control. 1 = Spread on. 0 = Spread off. Crystal output. Leave this pin floating if external clock is used. The spread % is factory programmed to either center spread or down spread with various spread percentages. The range for center spread is from ±0.25% to ±2.50%. The range for down spread is from –0.5% to –5.0%. Contact the factory for smaller or larger spread % amounts if required. The input to the CY25000 can be either a crystal or a clock signal. The input frequency range for crystals is 8–30 MHz, and for clock signals is 8–166 MHz. The CY25000 has two clock outputs, REFCLK and SSCLK. The non-spread spectrum REFCLK output has the same frequency as the input of the CY25000. The frequency modulated SSCLK output can be programmed from 3–200 MHz. The CY25000 products are available in an 8-pin SOIC (150-mil) package with a commercial operating temperature range of 0 to 70°C. Description Crystal input or reference clock input. General Description The CY25000 is a Spread Spectrum Clock Generator (SSCG) IC used for the purpose of reducing Electro Magnetic Interference (EMI) found in today’s high-speed digital electronic systems. The device uses a Cypress-proprietary PLL and Spread Spectrum Clock (SSC) technology to synthesize and modulate the frequency of the input clock. By frequency modulating the clock, the measured EMI at the fundamental and harmonic frequencies are greatly reduced. This reduction in radiated energy can significantly reduce the cost of complying with regulatory agency requirements (EMC) and improve time to market without degrading system performance. The CY25000 uses a factory-programmable configuration memory array to synthesize output frequency, spread %, crystal load capacitor, reference clock on/off and PD#/OE options. Document #: 38-07424 Rev. *B Page 2 of 10 CY25000 Absolute Maximum Rating Supply Voltage (VDD) ........................................–0.5 to +7.0V DC Input Voltage...................................... –0.5V to VDD + 0.5 Storage Temperature (Non-Condensing) .... –55°C to +125°C Junction Temperature ................................ –40°C to +125°C Data Retention @ Tj=125°C................................. > 10 Years Package Power Dissipation...................................... 350 mW Static Discharge Voltage.......................................... > 2000V (per MIL-STD-883, Method 3015) Operating Conditions Parameter VDD TA CLOAD Fref Supply Voltage Ambient Temperature Max. Load Capacitance @ pin 5 and pin 6 External Reference Crystal (Fundamental tuned crystals only) External Reference Clock FSSCLK FREFCLK tPU SSCLK output frequency, CLOAD =.


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