DatasheetsPDF.com

Serial EEPROM. CAT24M01 Datasheet

DatasheetsPDF.com

Serial EEPROM. CAT24M01 Datasheet






CAT24M01 EEPROM. Datasheet pdf. Equivalent




CAT24M01 EEPROM. Datasheet pdf. Equivalent





Part

CAT24M01

Description

1 Mb I2C CMOS Serial EEPROM



Feature


CAT24M01 EEPROM Serial 1-Mb I2C Descript ion The CAT24M01 is a EEPROM Serial 1 Mb I2C, internally organized as 131,07 2 words of 8 bits each. It features a 2 56−byte page write buffer and support s the Standard (100 kHz), Fast (400 kHz ) and Fast−Plus (1 MHz) I2C protocol. Write operations can be inhibited by t aking the WP pin High (this protects th e entire memory). Extern.
Manufacture

ON Semiconductor

Datasheet
Download CAT24M01 Datasheet


ON Semiconductor CAT24M01

CAT24M01; al address pins make it possible to addr ess up to four CAT24M01 devices on the same bus. On−Chip ECC (Error Correcti on Code) makes the device suitable for high reliability applications. Features • Supports Standard, Fast and Fast Plus I2C Protocol • 1.8 V to 5.5 V S upply Voltage Range • 256−Byte Page Write Buffer • Hardware Write Protec tion for Entire Memory • Schmitt.


ON Semiconductor CAT24M01

Triggers and Noise Suppression Filters on I2C Bus Inputs (SCL and SDA) • Low Power CMOS Technology • 1,000,000 Pr ogram/Erase Cycles • 100 Year Data Re tention • Industrial and Extended Tem perature Range • 8−pin, SOIC, TSSOP and 8−pad UDFN Packages • These De vices are Pb−Free, Halogen Free/BFR F ree and are RoHS Compliant VCC SCL A2, A1 WP CAT24M01 SDA VSS Figure 1..


ON Semiconductor CAT24M01

Functional Symbol www.onsemi.com SOIC −8 W SUFFIX CASE 751BD UDFN−8 HU5 SUFFIX CASE 517BU SOIC−8 X SUFFIX CA SE 751BE SOIC−8 WIDE X SUFFIX CASE 7 51BE TSSOP−8 Y SUFFIX CASE 948AL PI N CONFIGURATION NC 1 VCC A1 WP A2 S CL VSS SDA SOIC (W, X), TSSOP (Y), UD FN (HU5) For the location of Pin 1, pl ease consult the corresponding package drawing. Pin Name A1, A2 SD.

Part

CAT24M01

Description

1 Mb I2C CMOS Serial EEPROM



Feature


CAT24M01 EEPROM Serial 1-Mb I2C Descript ion The CAT24M01 is a EEPROM Serial 1 Mb I2C, internally organized as 131,07 2 words of 8 bits each. It features a 2 56−byte page write buffer and support s the Standard (100 kHz), Fast (400 kHz ) and Fast−Plus (1 MHz) I2C protocol. Write operations can be inhibited by t aking the WP pin High (this protects th e entire memory). Extern.
Manufacture

ON Semiconductor

Datasheet
Download CAT24M01 Datasheet




 CAT24M01
CAT24M01
EEPROM Serial 1-Mb I2C
Description
The CAT24M01 is a EEPROM Serial 1Mb I2C, internally
organized as 131,072 words of 8 bits each.
It features a 256byte page write buffer and supports the Standard
(100 kHz), Fast (400 kHz) and FastPlus (1 MHz) I2C protocol.
Write operations can be inhibited by taking the WP pin High (this
protects the entire memory).
External address pins make it possible to address up to four
CAT24M01 devices on the same bus.
OnChip ECC (Error Correction Code) makes the device suitable
for high reliability applications.
Features
Supports Standard, Fast and FastPlus I2C Protocol
1.8 V to 5.5 V Supply Voltage Range
256Byte Page Write Buffer
Hardware Write Protection for Entire Memory
Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs
(SCL and SDA)
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial and Extended Temperature Range
8pin, SOIC, TSSOP and 8pad UDFN Packages
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
VCC
SCL
A2, A1
WP
CAT24M01
SDA
VSS
Figure 1. Functional Symbol
www.onsemi.com
SOIC8
W SUFFIX
CASE 751BD
UDFN8
HU5 SUFFIX
CASE 517BU
SOIC8
X SUFFIX
CASE 751BE
SOIC8 WIDE
X SUFFIX
CASE 751BE
TSSOP8
Y SUFFIX
CASE 948AL
PIN CONFIGURATION
NC 1
VCC
A1 WP
A2 SCL
VSS SDA
SOIC (W, X), TSSOP (Y),
UDFN (HU5)
For the location of Pin 1, please consult the
corresponding package drawing.
Pin Name
A1, A2
SDA
SCL
WP
VCC
VSS
PIN FUNCTION
Function
Device Address
Serial Data
Serial Clock
Write Protect
Power Supply
Ground
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
June, 2018 Rev. 5
1
Publication Order Number:
CAT24M01/D




 CAT24M01
CAT24M01
MARKING DIAGRAMS
24M01A
AYMXXX
(SOIC8)
24M01A = Specific Device Code
A = Assembly Location
Y = Production Year (Last Digit)
M = Production Month (19, O, N, D)
XXX = Last Three Digits of
XXX = Assembly Lot Number
M0L
ALL
YM
G
(UDFN8)
M0L = Specific Device Code
A = Assembly Location Code
LL = Assembly Lot Number
Y = Year
M = Month
G = PbFree Package
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Storage Temperature
–65 to +150
°C
Voltage on any Pin with Respect to Ground (Note 1)
–0.5 to +6.5
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. The DC input voltage on any pin should not be lower than 0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than 1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol
Parameter
Min Units
NEND (Notes 3, 4) Endurance
1,000,000
Program/Erase Cycles
TDR Data Retention
100 Years
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
3. Test Condition: Page Mode, VCC = 5 V, 25°C.
4. The device uses ECC (Error Correction Code) logic with 6 ECC bits to correct one bit error in 4 data bytes. Therefore, when a single byte
has to be written, 4 bytes (including the ECC bits) are re-programmed. It is recommended to write by multiple of 4 bytes in order to benefit
from the maximum number of write cycles.
Table 3. D.C. OPERATING CHARACTERISTICS
VCC = 1.8 V to 5.5 V, TA = 40°C to +85°C and VCC = 2.5 V to 5.5 V, TA = 40°C to +125°C, unless otherwise specied.
Symbol
Parameter
Test Conditions
Min Max
ICCR
ICCW
ISB
IL
VIL1
VIL2
VIH1
VIH2
VOL1
VOL2
Read Current
Write Current
Standby Current
I/O Pin Leakage
Input Low Voltage
Input Low Voltage
Input High Voltage
Input High Voltage
Output Low Voltage
Output Low Voltage
Read, fSCL = 400 kHz / 1 MHz
VCC = 1.8 V
VCC = 5.5 V
All I/O Pins at GND or VCC
Pin at GND or VCC
2.5 V VCC 5.5 V
1.8 V VCC < 2.5 V
2.5 V VCC 5.5 V
1.8 V VCC < 2.5 V
VCC 2.5 V, IOL = 3.0 mA
VCC < 2.5 V, IOL = 1.0 mA
TA = 40°C to +85°C
TA = 40°C to +125°C
TA = 40°C to +85°C
TA = 40°C to +125°C
0.5
0.5
0.7 VCC
0.75 VCC
1
3.5
5.0
2
5
1
2
0.3 VCC
0.25 VCC
VCC + 0.5
VCC + 0.5
0.4
0.2
Units
mA
mA
mA
mA
V
V
V
V
V
V
www.onsemi.com
2




 CAT24M01
CAT24M01
Table 4. PIN IMPEDANCE CHARACTERISTICS
VCC = 1.8 V to 5.5 V, TA = 40°C to +85°C and VCC = 2.5 V to 5.5 V, TA = 40°C to +125°C, unless otherwise specied.
Symbol
Parameter
Conditions
Max
Units
CIN (Note 5)
SDA I/O Pin Capacitance
VIN = 0 V
8 pF
CIN (Note 5)
Input Capacitance (other pins)
VIN = 0 V
6 pF
IWP, IA (Note 6)
WP Input Current, Address Input Current (A1, A2)
VIN < VIH, VCC = 5.5 V
75 mA
VIN < VIH, VCC = 3.3 V
50
VIN < VIH, VCC = 1.8 V
25
VIN > VIH
2
5. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
6. When not driven, the WP, A1, A2 pins are pulled down to GND internally. For improved noise immunity, the internal pulldown is relatively
strong; therefore the external driver must be able to supply the pulldown current when attempting to drive the input HIGH. To conserve power,
as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pulldown reverts to a weak current source.
Table 5. A.C. CHARACTERISTICS (Note 7)
VCC = 1.8 V to 5.5 V, TA = 40°C to +85°C and VCC = 2.5 V to 5.5 V, TA = 40°C to +125°C, unless otherwise specified.
Standard
VCC = 1.8 V 5.5 V
Fast
VCC = 1.8 V 5.5 V
FastPlus
VCC = 2.5 V 5.5 V
TA = 405C to +855C
Symbol
Parameter
Min Max Min Max Min Max Units
FSCL
Clock Frequency
100
400
1,000
kHz
tHD:STA
START Condition Hold Time
4
0.6 0.25 ms
tLOW
Low Period of SCL Clock
4.7
1.3 0.45 ms
tHIGH
High Period of SCL Clock
4
0.6 0.40 ms
tSU:STA
START Condition Setup Time
4.7
0.6 0.25 ms
tHD:DAT
Data In Hold Time
0
0
0 ms
tSU:DAT
Data In Setup Time
250
100
50
ns
tR (Note 8)
SDA and SCL Rise Time
1,000
300
100 ns
tF (Note 8)
SDA and SCL Fall Time
300 300 100 ns
tSU:STO
STOP Condition Setup Time
4
0.6 0.25 ms
tBUF
Bus Free Time Between
4.7
1.3
0.5
ms
STOP and START
tAA SCL Low to Data Out Valid 3.5 0.9 0.40 ms
tDH Data Out Hold Time
50
50
50 ns
Ti (Note 8)
Noise Pulse Filtered at SCL
50
50
50 ns
and SDA Inputs
tSU:WP
WP Setup Time
0
0
0 ms
tHD:WP
WP Hold Time
2.5
2.5
1
ms
tWR Write Cycle Time
5 5 5 ms
tPU (Notes 8, 9) Power-up to Ready Mode
0.1 0.1 0.1 ms
7. Test conditions according to “A.C. Test Conditions” table.
8. Tested initially and after a design or process change that affects this parameter.
9. tPU is the delay between the time VCC is stable and the device is ready to accept commands.
Table 6. A.C. TEST CONDITIONS
Input Levels
Input Rise and Fall Times
Input Reference Levels
Output Reference Levels
Output Load
0.2 x VCC to 0.8 x VCC
50 ns
0.3 x VCC, 0.7 x VCC
0.5 x VCC
Current Source: IL = 3 mA (VCC 2.5 V); IL = 1 mA (VCC < 2.5 V); CL = 100 pF
www.onsemi.com
3






Recommended third-party CAT24M01 Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)