74HCT132A

www.DataSheet4U.net MC74HCT132A Quad 2-Input NAND Gate with Schmitt-Trigger Inputs with LSTTL Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. The MC74HCT132A can be used to enhance noise immunity or to square up slowly changing waveforms. Features http://onsemi.com MARKING DIAGRAMS 14 PDIP−14 N SUFFIX CASE 646 1 14 SOIC−14 D SUFFIX CASE 751A 1 HCT132AG AWLYWW MC74HCT132AN AWLYYWWG Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements as Defined by JEDEC Standard No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates These are Pb−Free Devices A1 B1 Y1 A2 B2 Y2 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC B4 A4 Y4 B3 A3 Y3 14 TSSOP−14 DT SUFFIX CASE 948G 1 14 SOEIAJ−14 F SUFFIX CASE 965 1 A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) 74HCT132A ALYWG HCT 132A ALYWG G Figure 1. Pin Assignment FUNCTION TABLE Inputs A L L H H B L H L H Output Y H H H L ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. © Semiconductor Components...