Document
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, and
dsPIC33FJ128GPX02/X04
16-bit Digital Signal Controllers (up to 128 KB Flash and 16K SRAM) with Advanced Analog
Operating Conditions
• 3.0V to 3.6V, -40ºC to +150ºC, DC to 20 MIPS • 3.0V to 3.6V, -40ºC to +125ºC, DC to 40 MIPS
Clock Management
• 2% internal oscillator • Programmable PLL and oscillator clock sources • Fail-Safe Clock Monitor (FSCM) • Independent Watchdog Timer • Low-power management modes • Fast wake-up and start-up
Core Performance
• Up to 40 MIPS 16-bit dsPIC33F CPU • Single-cycle MUL plus hardware divide
Advanced Analog Features
• 10/12-bit ADC with 1.1Msps/500 ksps rate: - Up to 13 ADC input channels and four S&H - Flexible/Independent trigger sources
• 150 ns Comparators: - Up to two Analog Comparator modules - 4-bit DAC with two ranges for Analog Comparators
Input/Output
• Software remappable pin functions • 5V-tolerant pins • Selectable open drain and internal pull-ups • Up to 5 mA overvoltage clamp current/pin • Multiple external interrupts
Packages
Type
SPDIP
SOIC
Pin Count
28
28
I/O Pins
21
21
Contact Lead/Pitch
.100”
1.27
Dimensions
.285x.135x1.365”
7.50x2.05x17.9
Note: All dimensions are in millimeters (mm) unless specified.
System Peripherals
• 16-bit dual channel 100 ksps Audio DAC • Cyclic Redundancy Check (CRC) module • Up to five 16-bit and up to two 32-bit Timers/
Counters • Up to four Input Capture (IC) modules • Up to four Output Compare (OC) modules • Real-Time Clock and Calendar (RTCC) module
Communication Interfaces
• Parallel Master Port (PMP) • Two UART modules (10 Mbps)
- Supports LIN 2.0 protocols - RS-232, RS-485, and IrDA® support • Two 4-wire SPI modules (15 Mbps) • Enhanced CAN (ECAN) module (1 Mbaud) with 2.0B support • I2C module (100K, 400K and 1Mbaud) with SMbus support • Data Converter Interface (DCI) module with I2S codec support
Direct Memory Access (DMA)
• 8-channel DMA with no CPU stalls or overhead • UART, SPI, ADC, ECAN, IC, OC, INT0
Qualification and Class B Support
• AEC-Q100 REVG (Grade 0 -40ºC to +150ºC) • Class B Safety Library, IEC 60730, VDE certified
Debugger Development Support
• In-circuit and in-application programming • Two program breakpoints • Trace and run-time watch
QFN-S
28 21 0.65 6x6x0.9
QFN
44 35 0.65 8x8x0.9
TQFP
44 35 0.80 10x10x1
© 2007-2012 Microchip Technology Inc.
DS70292G-page 1
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 PRODUCT FAMILIES
The device names, pin counts, memory sizes, and peripheral availability of each device are listed below. The following pages show their pinout diagrams.
TABLE 1:
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 CONTROLLER FAMILIES
Remappable Peripheral
Device
Pins Program Flash Memory
(Kbyte) RAM (Kbyte)(1) Remappable Pins 16-bit Timer(2) Input Capture Output Compare Standard PWM Data Converter Interface
UART SPI
ECAN™ External Interrupts(3)
RTCC I2C™ CRC Generator 10-bit/12-bit ADC (Channels) 16-bit Audio DAC (Pins) Analog Comparator (2 Channels/Voltage Regulator) 8-bit Parallel Master Port (Address Lines) I/O Pins Packages
dsPIC33FJ128GP804 44 128 16 26 5 4 4
1 2 2 1 3 1 1 1 13 6 1/1 11 35 QFN TQFP
dsPIC33FJ128GP802 28 128 16 16 5 4 4
1 2 2 1 3 1 1 1 10 4 1/0
2 21 SPDIP SOIC QFN-S
dsPIC33FJ128GP204 44 128 8 26 5 4 4
1 2 2 0 3 1 1 1 13 0 1/1 11 35 QFN TQFP
dsPIC33FJ128GP202 28 128 8 16 5 4 4
1 2 2 0 3 1 1 1 10 0 1/0
2 21 SPDIP SOIC QFN-S
dsPIC33FJ64GP804 44 64 16 26 5 4 4
1 2 2 1 3 1 1 1 13 6 1/1 11 35 QFN TQFP
dsPIC33FJ64GP802 28 64 16 16 5 4 4
1 2 2 1 3 1 1 1 10 4 1/0
2 21 SPDIP SOIC QFN-S
dsPIC33FJ64GP204 44 64 8 26 5 4 4
1 2 2 0 3 1 1 1 13 0 1/1 11 35 QFN TQFP
dsPIC33FJ64GP202 28 64 8 16 5 4 4
1 2 2 0 3 1 1 1 10 0 1/0
2 21 SPDIP SOIC QFN-S
dsPIC33FJ32GP304 44 32 4 26 5 4 4
1 2 2 0 3 1 1 1 13 0 1/1 11 35 QFN TQFP
dsPIC33FJ32GP302 28 32 4 16 5 4 4
1 2 2 0 3 1 1 1 10 0 1/0
2 21 SPDIP SOIC QFN-S
Note
1: 2: 3:
RAM size is inclusive of 2 Kbytes of DMA RAM for all devices except dsPIC33FJ32GP302/304, which include 1 Kbyte of DMA RAM. Only four out of five timers are remappable. Only two out of three interrupts are remappable.
DS70292G-page 2
© 2007-2012 Microchip Technology Inc.
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
Pin Diagrams
28-Pin SPDIP, SOIC
MCLR
AN0/VREF+/CN2/RA0
AN1/VREF-/CN3/RA1 PGED1/AN2/C2IN-/RP0(1)/CN4/RB0 PGEC1/ AN3/C2IN+/RP1(1)/CN5/RB1
AN4/C1IN-/RP2(1)/CN6/RB2 AN5/C1IN+/RP3(1)/CN7/RB3
VSS
OSC1/CLKI/CN30/RA2
OSC2/CLKO/CN29/PMA0/RA3 SOSCI/RP4(1)/CN1/PMBE/RB4
SOSCO/T1CK/CN0/PMA1/RA4
VDD PGED3/ASDA1/RP5(1)/CN27/PMD7/RB5
1 2 3 4 5
6 7 8 9 10 11 12 13 14
dsPIC33FJ64GP802 dsPIC33FJ128GP802
= Pins are up to 5V tolerant
28 AVDD 27 AVSS 26 AN9/DAC1LN/RP15(1)/CN11/PMCS1/RB15 25 AN10/DAC1LP/RTCC/RP14(1)/CN12/PMWR/RB14 24 AN11/DAC1RN/RP13(1)/CN13.