EM68916CWQA

www.DataSheet.co.kr EtronTech Etron Confidential Features JEDEC Standard Compliant JEDEC Standard 1.8V I/O (SSTL_18-compatible) Power supplies: VDD & VDDQ = +1.8V ± 0.1V Operating temperatue: 0 – 85 °C Supports JEDEC clock jitter specification Fully synchronous operation Fast clock rate: 266/333/400MHz Differential Clock, CK & CK# Bidirectional single/differential data strobe -DQS & DQS# 4 internal banks for concurrent operation 4-bit prefetch architecture Internal pipeline architecture Precharge & active power down Programmable Mode & Extended Mode registers Posted CAS# additive latency (AL): 0, 1, 2, 3, 4, 5 CAS# Latency: 3, 4, 5, 6 WRITE latency = READ latency - 1 tCK Burst length: 4 or 8 Burst type: Sequential / Interleave DLL enable/disable Off-Chip Driver (OCD) -Impedance Adjustment -Adjustable data-output drive strength On-die termination (ODT) RoHS compliant Auto Refresh and Self Refresh 8192 refresh cycles / 64ms Package: 84-ball 8x12.5x1.2mm (max) FBGA - Pb Free and Halogen Free EM68916CWQA Advanced (Rev 1.1 Apr. / 2009) Overview The EM68916C is a high-speed CMOS DoubleData-Rate-Two (DDR2), synchronous dynamic random-access memory (SDRAM) containing 128 Mbits in a 16-bit wide data I/Os. It is internally configured as a quad bank DRAM, 4 banks x 2Mb addresses x 16 I/Os The device is designed to comply with DDR2 DRAM key features such as posted CAS# with additive latency, Write latency = Read latency -1, Off-Chip Dri...