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Integrated System Solution Corp.
IS1621N Bluetooth v2.1+EDR Multimedia
Bluetooth Multimedia v2.1 + EDR
Datasheet: IS1621N Version: 0.96
ISSC
Integrated System Solution Corporation Date: Jun. 8, 2009
Preliminary Datasheet
Page 1
Released date: 6/8/2009 Revision 0.96
© 2000~2009 Integrated Systems Solution Corporation
Datasheet pdf - http://www.DataSheet4U.net/
www.DataSheet.co.kr
Integrated System Solution Corp.
IS1621N Bluetooth v2.1+EDR Multimedia
1. General Description
ISSC IS1621N is a compact, high integration, ultra-low cost, CMOS single-chip RF + baseband IC for Bluetooth v2.1+EDR (Enhanced Data Rate) 2.4GHz applications. This chip is fully compliant with Bluetooth specification and completely backward-compatible with BT1.1, 1.2 or 2.0 systems. It incorporates Bluetooth 1M/2M/3Mbps RF, single-cycle 8051, TX/RX modem, memory controller, task/hopping controller, UART interface, and ISSC Bluetooth software stack to achieve the required BT v2.1+EDR functions. To provide the best audio and voice quality, it also integrates a DSP co-processor, and a high performance stereo CODEC to handle voice and audio applications. For voice, not only basic A-law/µ-law/CVSD encoding /decoding but also enhanced noise reduction and echo cancellation are implemented by the built-in audio processor to reach the best quality in the both sending and receiving sides. For enhanced audio applications, SBC or MP3 encoding/decoding functions are also carried out by audio processor to satisfy A2DP requirements. In addition, to minimize the external components required for portable devices, a voltage sensor for battery, battery charger, a switching regulator and LDOs are integrated to reduce BOM cost for various Bluetooth applications. The device incorporates built-in self-test (BIST) and auto-calibration functions to simplify production test.
2. Features
System Specification • Compliant with Bluetooth Specification v.2.1 + EDR in 2.4 GHz ISM band
Baseband Hardware • • 16MHz main clock input Firmware execution from either internal ROM or external flash
Page 2 Released date: 6/8/2009 Revision 0.96
Preliminary Datasheet
© 2000~2009 Integrated Systems Solution Corporation
Datasheet pdf - http://www.DataSheet4U.net/
www.DataSheet.co.kr
Integrated System Solution Corp.
IS1621N Bluetooth v2.1+EDR Multimedia
• • •
Built-in internal ROM or 4M flash for program memory Built-in 32 KB RAM for data storage and baseband data transfer buffering New features for Bluetooth 2.1 o o o o o o o Encryption Pause and Resume Erroneous Data Reporting Extended Inquiry Response Link Supervision Timeout Changed Event Non-Flushable Packet Boundary Flag Secure Simple Pairing Sniff Subtracting
• •
Support both Pico-net and Scatter-net applications Hard-wired logic for modulation, demodulation, access code correlation, whitening, forward error correction (FEC), header error check (HEC), shorten hamming code, CRC generation/checking, frame check sequence (FCS), encryption bit stream generation, and transmit pulse shaping
• •
Adaptive Frequency Hopping (AFH) avoids occupied RF channels Fast Connection supported
RF Hardware • • • • • • Fully Bluetooth 2.1 + EDR system in 2.4 GHz ISM band. Combined TX/RX RF terminal simplifies external matching and reduces external antenna switches. +4dBm output power with level control 13 dB from register control. For Class2/3, transmitter support without the requirement for external power amplifier and TR switch. Build-in channel filter. To avoid temperature variation, temperature sensor with temperature calibration is utilized into bias current and gain control.
Preliminary Datasheet Page 3 Released date: 6/8/2009 Revision 0.96
© 2000~2009 Integrated Systems Solution Corporation
Datasheet pdf - http://www.DataSheet4U.net/
www.DataSheet.co.kr
Integrated System Solution Corp.
IS1621N Bluetooth v2.1+EDR Multimedia
• •
Fully integrated synthesizer has been created. There requires no external VCO, varactor diode, resonator and loop filter. Crystal oscillation with build-in digital trimming for temperature/process variations.
Audio processor • • • • 16-bit/32-bit run time configurable audio processor Single cycle data computing up to 60 MIPS Support 64 kb/s A-Law or µ-Law PCM format, or CVSD (Continuous Variable Slope Delta Modulation) for SCO channel operation. SBC and optional MP3 supported
Stereo Audio Codec • • • • • 16 bit stereo codec Dual mono microphone and stereo line in for ADC 94dB SNR stereo DAC playback Integrate headphone amplifier for 16Ω speakers Capacitor-less headphone driver stage for single-ended speakers
Peripherals • • • Built-in Lithium-ion battery charger Integrate 3V, 1.8V LDO and Switching mode regulator Built-in 10-bit Aux-ADC for battery monitor and voltage sense.
Flexible HCI interface • High speed HCI-UART (Universal Asynchronous Receiver Transmitter) interface
Package • 68QFN standard package
Page 4 Released date: 6/8/2009 Revision 0.96
Prelim.